Merge branch 'exception-handling'

Heiko Carstens says:

====================

Extend the existing get_trap_ip() so that it returns the address of
the instruction which caused an exception, and use that for both the
disassembler as well as exception handling.

This allows improving two things:

- The in kernel disassembler prints PGM+PSW markers which clearly
  identify the instruction causing an exception, and the current PSW
  address. This replaces the previous "best guess" approach with '*' and
  '>' markers

- EX_TABLE entries for inline assemblies are simplified. Only the address
  of the faulting instruction needs to be provided from now on. The second
  entry, which is the address following the faulting instruction, is not
  needed anymore

Disassembler
------------

The output of the kernel disassembler changes. If the disassembly is
printed as a result of a program check, 'PGM' and 'PSW' markers identify
the instruction which caused the exception, and where the PSW points
to. For suppressing exceptions, the output now looks like this:

 Krnl Code:
            000003ff8dc7bff8: e310f0080004 lg      %r1,8(%r15)
       PGM >000003ff8dc7bffe: e3a0e0000004 lg      %r10,0(%r14)
       PSW >000003ff8dc7c004: a7280000     lhi     %r2,0
            000003ff8dc7c008: eb9ff0900024 stmg    %r9,%r15,144(%r15)

For nullifying exceptions where both addresses are the same,
'PGM+PSW >' is printed instead:

 Krnl Code:
            000003ff8dc7bff8: e310f0080004 lg      %r1,8(%r15)
   PGM+PSW >000003ff8dc7bffe: e3a0e0000004 lg      %r10,0(%r14)
            000003ff8dc7c004: a7280000     lhi     %r2,0
            000003ff8dc7c008: eb9ff0900024 stmg    %r9,%r15,144(%r15)

EX_TABLE entries
----------------

With get_trap_ip() now returning the exact faulting instruction address,
EX_TABLE entries for inline assemblies are simplified. Only the address
of the faulting instruction needs to be provided. The second entry - the
address following the faulting instruction - is no longer needed.

For example, an inline assembly using a single instruction can now be
written as:

        asm_inline volatile(
                "0:     lg      %[data],%[addr]\n"
                "1:\n"
                EX_TABLE_INSN(0b, 1b));

Previously this required:

        asm_inline volatile(
                "       nopr    %%r7\n"
                "0:     lg      %[data],%[addr]\n"
                "1:     nopr    %%r7\n"
                EX_TABLE(0b, 1b)
                EX_TABLE(1b, 1b));

The old approach had several non-obvious restrictions:

- If an instruction immediately preceding the inline assembly caused a
  non-nullifying exception, the PSW would point to the start of the
  inline assembly. If the faulting instruction was placed there, the
  exception handler would incorrectly resolve the fault using the inline
  assembly's fixup handler.  Hence, a leading NOP was required before the
  faulting instruction

- Similarly, an exception table entry placed behind a faulting
  instruction must also point to an instruction that cannot fault. A
  nullifying exception on the following instruction would otherwise be
  incorrectly resolved by that entry

- Furthermore, instructions that can cause both nullifying and
  non-nullifying exceptions required two separate exception table entries

These restrictions are error-prone and have caused several bugs in the
past.

All EX_TABLE* macros have been renamed to EX_TABLE_INSN*. This allows the
old and new semantics to be distinguished, and ensures that backports of
code using the new semantics will intentionally fail to compile if the
new infrastructure is not present.

Note
----

There are some existing oddities and corner cases with kprobes. Only
some of them will be addressed with this series. The other ones will
be addressed with follow-on changes, since this series is already
large enough.

====================

Signed-off-by: Heiko Carstens <hca@linux.ibm.com>

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