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| author | Yo-Jung <yo-jung@canonical.com> | 2026-10-13 13:36:03 +0530 |
|---|---|---|
| committer | Andi Shyti <andi.shyti@kernel.org> | 2026-10-13 12:36:29 +0200 |
| commit | bf31dd72f0d50d5acc71d7777b5dae6c51b3ba17 (patch) | |
| tree | be9162b5ca62dd84b859f533a8a606db7d78c5d4 /tools/lib/python | |
| parent | 09753024bbd330b31ec5510fe22a248fd94d5b53 (diff) | |
| download | linux-next-bf31dd72f0d50d5acc71d7777b5dae6c51b3ba17.tar.gz linux-next-bf31dd72f0d50d5acc71d7777b5dae6c51b3ba17.zip | |
i2c: i801: Gate SPD instantiation on SPD Write Disable bit
When DDR5 memory modules are present, probing the spd5118 hub requires
page-selection write transactions. If the BIOS has set the SPD Write
Disable (SPD_WD) bit in SMBHSTCFG, the transaction fails and wedges the
controller into an unrecoverable "SMBus is busy" state.
Pass the PCH SPD Write Disable status into the SMBus core via
i2c_register_spd_write_disable(). This safely skips spd5118 instantiation
under write-protection while leaving legacy DDR4 (ee1004) functional.
Retain the original #ifdef CONFIG_I2C_I801_MUX preprocessor block around
mux_pdev to prevent compile-time regressions when the multiplexer driver
is disabled.
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=213345
Co-developed-by: Saranya Gopal <saranya.gopal@intel.com>
Signed-off-by: Saranya Gopal <saranya.gopal@intel.com>
Signed-off-by: Yo-Jung <yo-jung@canonical.com>
Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://patch.msgid.link/20261013080603.808196-1-saranya.gopal@intel.com
Diffstat (limited to 'tools/lib/python')
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