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| author | Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> | 2026-09-10 11:50:15 +0530 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2026-10-03 09:45:51 +0200 |
| commit | b27be5a85ed3c11b51de189218d7a78b0972af4d (patch) | |
| tree | c1bfe1e240505b3c39df5160d339eef44e8c237a /tools/lib/python | |
| parent | a936b634dd62a414a3da6517fac11f02117ffd7e (diff) | |
| download | linux-next-b27be5a85ed3c11b51de189218d7a78b0972af4d.tar.gz linux-next-b27be5a85ed3c11b51de189218d7a78b0972af4d.zip | |
soundwire: qcom: add EE-aware register layout for Shikra
On SoundWire v2.0 and later hardware, FIFO, and status
registers are banked per Execution Environment (EE).
The existing driver assumes the SoundWire controller is
assigned to EE1, which is true for all currently supported
Qualcomm SoCs.
Shikra is an exception and assigns the controller to EE0.
As a result, the relevant register windows are located at
different offsets and cannot be accessed using the default
EE1 register layout.
Add an ee field to the SoC match data and introduce a
dedicated qcom,shikra-soundwire compatible with ee = 0.
The driver uses this information at probe time to select
the correct register layout, while all existing platforms
continue to use the default EE1 configuration.
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Link: https://patch.msgid.link/20260910-shikra_soundwire_support-v2-2-f98c9a6ea1e1@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions