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| author | Luca Weiss <luca.weiss@fairphone.com> | 2026-08-07 09:46:04 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-08-31 15:05:30 -0500 |
| commit | 5ffd02d16f4e2f0566b8f31d5610538987e1944c (patch) | |
| tree | d8f149003a4a7baa82554d4f5dc0d2f7ecb3cbcc /tools/lib/python | |
| parent | cee9395acd8043be0644b25c34bfa86623f2b935 (diff) | |
| download | linux-next-5ffd02d16f4e2f0566b8f31d5610538987e1944c.tar.gz linux-next-5ffd02d16f4e2f0566b8f31d5610538987e1944c.zip | |
clk: qcom: gcc-eliza: Fix always-enabling PCIE_RSCC clocks
The critical_cbrcrs array will get qcom_branch_set_clk_en() called on
each entry which will set BIT(0) to enable the clock. This is however
wrong for these two PCIE_RSCC clocks which need BIT(20) and BIT(21) set
respectively to enable them.
Fixes: 3d356ab4a1ec ("clk: qcom: Add support for Global clock controller on Eliza")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260807-various-pcie-clk-fix-v1-1-5caf78a599d7@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions