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authorChanghuang Liang <changhuang.liang@starfivetech.com>2026-09-30 05:43:05 -0700
committerConor Dooley <conor.dooley@microchip.com>2026-10-02 20:58:09 +0100
commit412d6e358eec72bd5227e4fd4a5af9461e695fbf (patch)
treed54cc80f5c7e543d3ecbc667911ec7e5db11ad05 /tools/lib/python/kdoc
parent59e04d1e99361ceeb2dd474a6a66f8cd9937d3d2 (diff)
downloadlinux-next-412d6e358eec72bd5227e4fd4a5af9461e695fbf.tar.gz
linux-next-412d6e358eec72bd5227e4fd4a5af9461e695fbf.zip
dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator
Add bindings for the Peripheral-0 clock and reset generator (PER0CRG) on the JHB100 RISC-V SoC by StarFive Ltd. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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