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authorYong-Xuan Wang <yongxuan.wang@sifive.com>2026-10-05 19:02:38 -0600
committerPaul Walmsley <pjw@kernel.org>2026-10-05 19:02:38 -0600
commit6694612317e5225086e39ca1ba97ada2b1942e48 (patch)
tree93c71792c94fc369d79f50776ae784d812c67d36 /tools/lib/python/kdoc/python_version.py
parent148ab873d8194cb44f29474da3b4428fa2e100d1 (diff)
downloadlinux-next-6694612317e5225086e39ca1ba97ada2b1942e48.tar.gz
linux-next-6694612317e5225086e39ca1ba97ada2b1942e48.zip
RISC-V: Clear HSTATUS.HU on CPU initialization
The RISC-V privileged specification does not mandate HSTATUS reset values, leaving the HU bit potentially set after hardware reset. When HU=1, hypervisor instructions (HLV/HLVX/HSV) can execute in U-mode to access guest memory, which may cause unintended behavior if not explicitly controlled. Clear HSTATUS.HU during CPU initialization to ensure hypervisor instructions are only available in HS-mode, preventing unexpected guest memory access from U-mode code. Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Link: https://patch.msgid.link/20260924-hstatus_hu-v2-1-7e970f5f1d8d@sifive.com Cc: stable@vger.kernel.org [pjw@kernel.org: capitalized RISCV_ISA_EXT_h to fix build; added stable cc] Signed-off-by: Paul Walmsley <pjw@kernel.org>
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