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authorAdrian Betschart <adrian.betschart@cinemaone.ch>2026-09-25 09:48:29 +0200
committerAlex Deucher <alexander.deucher@amd.com>2026-10-07 13:13:32 -0400
commit54c998c55fc9cbc391b350d67b86e0c2a0748f1a (patch)
tree81e76091c9985f588d28039a118d3cae26445c71 /tools/lib/python/kdoc/python_version.py
parentf145d5b3f740de05d85257acdc82f6877180f5c6 (diff)
downloadlinux-next-54c998c55fc9cbc391b350d67b86e0c2a0748f1a.tar.gz
linux-next-54c998c55fc9cbc391b350d67b86e0c2a0748f1a.zip
drm/amd/display: Don't replace a sink mode that shares the native totals
decide_crtc_timing_for_drm_display_mode() copies the native mode's CRTC timing into the requested mode when clock, htotal and vtotal match. That is meant for the modes amdgpu inserts itself: amdgpu_dm_create_common_mode() duplicates the native mode and changes only hdisplay and vdisplay, so those are sent with the native timing and scaled. A sink can also offer a real mode with the same clock and totals as its native mode. CTA-861 VIC 102 (4096x2160@60) and VIC 97 (3840x2160@60) both use 594 MHz and 4400x2250. With 3840x2160@60 as the preferred mode, a 4096x2160@60 request goes out with the 3840x2160 timing and the framebuffer scaled into it (dst 3840x2025 at y=67), while the AVI InfoFrame still carries VIC 102. A JVC projector then reports 3840x2160 and shows a corrupted right edge. 4096x2160@24, whose totals differ, is sent and displayed correctly. Inserted modes keep the native sync positions; a real mode with its own active width does not. Compare those too, so only inserted modes are patched. Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)") Signed-off-by: Adrian Betschart <adrian.betschart@cinemaone.ch> Assisted-by: Claude-Code:claude-opus-5-5 Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 22f9a2da101c37f821cd00954f81dc598754f4d5) Cc: stable@vger.kernel.org
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