Merge branch 'net-sparx5-add-tas-offload'

Daniel Machon says:

====================
net: sparx5: add TAS offload

This series adds offload of the Time Aware Shaper (IEEE 802.1Qbv),
configured through tc-taprio, on Sparx5 and lan969x, which are both
served by the sparx5 driver.

In hardware, a TAS schedule is run by a TAS list, which steps through
gate control list (GCL) entries taken from a pool shared by all ports.
Sparx5 has 128 lists and 10000 GCL entries, lan969x has 60 lists and
3000 entries. An idle list is in the ADMIN state. Once started, it is
PENDING until its base time, then OPERATING. A stopped list is
TERMINATING until the end of its cycle, and then goes back to ADMIN.

The driver uses two lists per port, so a new schedule can be set up in
one list while the current one keeps running in the other. When the
new list reaches its base time, the hardware stops the old one.

The two chips differ in how a list addresses its entries: on Sparx5 a
list is a contiguous range addressed relative to its base, on lan969x
it is a linked list addressed by absolute pool index. The driver
handles both.

Frame preemption is not supported yet, and every queue uses the
default guard band of 1536 bytes. Making the guard band follow the MTU,
and taprio queueMaxSDU, are left for a follow-up.

Patch #1 adds the registers used by TAS.

Patch #2 moves the existing TAS link speed configuration to a new
sparx5_tas.c.

Patch #3 adds the taprio offload.
====================

Link: https://patch.msgid.link/20261006-sparx5-tas-v1-0-5eef1126dfd5@microchip.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

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