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| author | Sascha Bischoff <Sascha.Bischoff@arm.com> | 2026-09-04 11:43:55 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2026-09-14 10:49:08 +0100 |
| commit | f6732cd67a025d8d216ee591ba5705a99ab974a1 (patch) | |
| tree | b7ad1e20c3affd20ce7401622cdc65dcacd11378 /tools/arch | |
| parent | 11070de575623735ca1040c9b3c42086fd5eaba9 (diff) | |
| download | linux-next-f6732cd67a025d8d216ee591ba5705a99ab974a1.tar.gz linux-next-f6732cd67a025d8d216ee591ba5705a99ab974a1.zip | |
KVM: arm64: gic-v5: Add KVM_VGIC_V5_ADDR_TYPE_IRS to UAPI
Define the UAPI address type used by userspace to describe the
location of the emulated IRS in guest physical address space, together
with the size reserved for that region.
As per the GICv5 specification, the IRS has one CONFIG_FRAME and
optionally one SETLPI_FRAME per interrupt domain. Within a KVM VM we
are only concerned with one interrupt domain. Each of these frames is
64kB in size, so reserve 2x64kB of contiguous memory in the GPA space
for a GICv5 IRS.
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Link: https://patch.msgid.link/20260904113404.4051341-20-sascha.bischoff@arm.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'tools/arch')
| -rw-r--r-- | tools/arch/arm64/include/uapi/asm/kvm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/tools/arch/arm64/include/uapi/asm/kvm.h b/tools/arch/arm64/include/uapi/asm/kvm.h index 1c13bfa2d38a..d1b2ca317f58 100644 --- a/tools/arch/arm64/include/uapi/asm/kvm.h +++ b/tools/arch/arm64/include/uapi/asm/kvm.h @@ -97,6 +97,11 @@ struct kvm_regs { #define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) #define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) +/* Supported VGICv5 address types */ +#define KVM_VGIC_V5_ADDR_TYPE_IRS 6 + +#define KVM_VGIC_V5_IRS_SIZE (2 * SZ_64K) + #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ #define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */ #define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */ |