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| author | Rafal Ostrowski <rafal.ostrowski@amd.com> | 2026-09-09 11:03:45 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-10-07 12:06:21 -0400 |
| commit | 98cce5bee9b94da012e19af439b163b0a82cc2a4 (patch) | |
| tree | c6107e815cc782682cae6245e366641761759bc1 /scripts/Makefile.thinlto | |
| parent | f65cda7eacab466bf50965179918e1af9c33b84b (diff) | |
| download | linux-next-98cce5bee9b94da012e19af439b163b0a82cc2a4.tar.gz linux-next-98cce5bee9b94da012e19af439b163b0a82cc2a4.zip | |
drm/amd/display: Prepare DSC configuration before BLS execution
[Why]
DSC sequence operations calculated configuration during execution and
passed OPTC outputs through pointers into other sequence steps. This
coupled consumers to step storage and mixed calculation with programming.
[How]
Merge the DSC configuration operations into DSC_SET_CONFIG. Prepare
register values in each DSC instance during build and pass OPTC values
by value to timing-generator and stream-encoder operations.
Share stream composition while preserving link-update and ODM padding.
Use the correct DCN401 preparation callback and remove the legacy ops.
Validate local composition inputs and capacity, stop immediate programming
on preparation failure, and publish prepared caches only on success.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Chris Park <chris.park@amd.com>
Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions
