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authorAlison Schofield <alison.schofield@intel.com>2026-11-02 12:16:00 -0800
committerDave Jiang <dave.jiang@intel.com>2026-11-02 13:43:25 -0700
commit96a2f5773a2798744957e97804ee2593f0cf82d2 (patch)
tree6955b81c7fe0c0322697e5ec8e4bb17dd84dddfa /scripts/Makefile.thinlto
parentdfa9daea3c005b317120227ddd7507e5ffeee27e (diff)
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cxl/region: Factor out cxl_port_parent_interleave()
cxl_switch_port_setup_targets() derives a decoder's interleave from the interleave of the decoder above it. That parent interleave comes from either the root decoder or a switch decoder, and each case is open coded along with the parent validity checks. Move the parent interleave lookup and validation to a new helper, cxl_port_parent_interleave(). No functional change. Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com> Reviewed-by: Richard Cheng <icheng@nvidia.com> Reviewed-by: Li Ming <ming.li@zohomail.com> Link: https://patch.msgid.link/c9517ef7c5cb0c2622b7cf5067f8f83fcb8de7f8.1793649898.git.alison.schofield@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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