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authorPaolo Pisati <p.pisati@gmail.com>2026-11-03 17:27:37 +0100
committerBartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>2026-11-06 10:26:09 +0100
commit75b1038b88ddb729cfc8d5652d944924b16cc8a5 (patch)
tree0f32e64e120dff5153c654fe82729160976b23a3 /scripts/Makefile.thinlto
parent0fa38ba784896f2fc32c9dacd33822f844b21906 (diff)
downloadlinux-next-75b1038b88ddb729cfc8d5652d944924b16cc8a5.tar.gz
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gpio-f7188x: Add support for NCT5104D
The Nuvoton NCT5104D is a Super I/O with four UARTs and 17 GPIO lines, found on PC Engines APU2 boards. Like the NCT6126D, it keeps its GPIOs in logical device 7, uses 1 for input in the direction register, and has a single data register and no Fintek vendor ID. It differs from the NCT6126D in three ways: - the device ID carries the silicon revision in its low nibble, so match 0xC452 (rev. B) and 0xC453 (rev. C); the NCT6102D and NCT6106D report the same IDs and are untested - the output type sits in logical device 0x0F, one register per group, with 1 for open drain - GP0x and GP1x share their pins with UART C and UART D (CR1C bits 3 and 2). Register a bank only when its pins are routed to GPIO and its group is enabled in LD7 CR30, and log each skipped bank Only GP0x and GP1x are supported; GP67, the one line of group 6, is left out: its pin is not connected on the APU2. This replaces the out-of-tree gpio-nct5104d driver that PC Engines ships with the datasheet, which was posted once in 2017: https://github.com/tasanakorn/linux-gpio-nct5104d https://lore.kernel.org/r/77f71974-541e-7e06-d37d-c52b9623ed25@pignat.org Tested push-pull and open-drain configurations on a PC Engines APU2, with UART C and D switched to GPIO in the firmware. The code is the author's; Claude (Opus 5.5 and Fable 5.1) reviewed it and drafted this changelog. Signed-off-by: Paolo Pisati <p.pisati@gmail.com> Link: https://patch.msgid.link/20261103162738.135836-1-p.pisati@gmail.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
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