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authorAlison Schofield <alison.schofield@intel.com>2026-11-04 19:28:29 -0800
committerDave Jiang <dave.jiang@intel.com>2026-11-10 10:51:51 -0700
commit5911237cee953384871c2b10d7373f5cd49bd641 (patch)
treeefeb99cc01bc75eeba3a7e949c1795a731044321 /scripts/Makefile.thinlto
parent57f95cb59ffd2f276cc6e434982ec1dbfd614021 (diff)
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cxl/region: Show access attributes once performance data is calculated
Region access attributes expose calculated latency and bandwidth to userspace, allowing the performance of individual CXL regions to be inspected independently of their use as system RAM. Currently, attribute visibility is refreshed only when performance data is propagated to a NUMA node. Regions whose memory is not onlined as system RAM, such as pmem and devdax regions, can have valid performance data that userspace cannot inspect. Refresh attribute visibility when the region completes and its performance data has been calculated. The existing visibility checks continue to hide attributes without valid values, and NUMA node performance updates remain unchanged. Fixes: c20eaf44113e ("cxl/region: Add sysfs attribute for locality attributes of CXL regions") Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Li Ming <ming.li@zohomail.com> Link: https://patch.msgid.link/eb2b648a7b0446f65d6ac2db6eb4f247ee72cea6.1793847269.git.alison.schofield@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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