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authorLeo Yan <leo.yan@arm.com>2026-10-25 16:24:06 +0000
committerIngo Molnar <mingo@kernel.org>2026-11-06 09:50:37 +0100
commit526d945ad9c09d42f2482f058e1f41376681627e (patch)
treec3909ca243e868a9445ab2986d332c1a491c3c90 /scripts/Makefile.thinlto
parent927f9c5cdadbc4ac6973bcd1690107fcb392612c (diff)
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Revert "perf/aux: Allocate non-contiguous AUX pages by default"
This reverts commit 18049c8cff9cc89daadc4df6975f7d9069638926. The original commit claimed that contiguous AUX pages unnecessarily exacerbate fragmentation for SPE, TRBE and ETR. This is not generally valid: larger allocations can keep pages with the same lifetime together, while order-0 allocations can scatter them across large blocks and prevent free pages from coalescing [1]. The follow-up discussion [2] has not established how forcing order-0 allocations addresses the reported problem. TRBE and SPE write to virtually addressed buffers. The TRBE L1 TLB has one entry on Neoverse V2 [3] and two on Neoverse V3 [4]. Small mappings increase translation pressure, and TTW stalls can contribute to FIFO overflow and trace loss on TRBE. Larger allocations provide contiguous, aligned chunks for PMD or contiguous-PTE mappings with the proposed vmap() support [5]. With the proposed vmap() support already applied, the tests in [2] showed that preferring larger AUX allocations reduced L2 data TLB refills by 99.68% in the TRBE test and 34.74% in the SPE test. Restore the previous policy of trying higher-order allocations first. The allocator already uses __GFP_NORETRY and falls back to smaller orders, including order 0, when larger allocations fail. Remove PERF_PMU_CAP_AUX_PREFER_LARGE, since the restored default provides that preference. Intel PT retains its existing allocation behaviour, with no functional change. [1] https://lore.kernel.org/all/aPjrRkjiIt6HmXmT@casper.infradead.org/ [2] https://lore.kernel.org/linux-arm-kernel/20260810-perf_aux_trace_large_granule-v1-0-03306c9339e3@arm.com/ [3] https://documentation-service.arm.com/static/633fe1ec4c59b30b517730b8#page=52 [4] https://documentation-service.arm.com/static/67361bd2c7fc0d1f211da382#page=54 [5] https://lore.kernel.org/linux-mm/20260715120813.3609949-1-jiangwen6@xiaomi.com/ Signed-off-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: James Clark <james.clark@linaro.org> Reviewed-by: Dev Jain <dev.jain@arm.com> Link: https://patch.msgid.link/20261025-perf_revert_prefer_large_alloc-v1-1-5fb431bbd624@arm.com
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