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| author | Dave Jiang <dave.jiang@intel.com> | 2026-11-09 15:47:31 -0700 |
|---|---|---|
| committer | Dave Jiang <dave.jiang@intel.com> | 2026-11-09 15:47:31 -0700 |
| commit | 34481a753340d56e8ab2e1067ad3a54391728d26 (patch) | |
| tree | 2efb15f164eaaab91f2c9042bf890d7c8c2fd92a /scripts/Makefile.thinlto | |
| parent | e44dc3a3037346354ac0dcd70415a7e049fab059 (diff) | |
| parent | d7e0ff278782919b0a9421f0013ece81ce3b3454 (diff) | |
| download | linux-next-34481a753340d56e8ab2e1067ad3a54391728d26.tar.gz linux-next-34481a753340d56e8ab2e1067ad3a54391728d26.zip | |
Merge branch 'for-7.5/cxl-back-invalidate' into cxl-for-next
Add CXL back invalidate support:
cxl/doc: Update maturity map with BI support
cxl/test: Add mock BI topology support
cxl: Handle auto-committed BI hdm decoders
cxl/pci: Split BI capability probe from setup
cxl/region: Log the coherency model at region creation
cxl/hdm: Rename decoder coherency flags
cxl: Add HDM-DB region creation
cxl/hdm: Add BI coherency support for endpoint decoders
cxl/pci: Add BI topology enable/disable
cxl: Add BI register probing and port initialization
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions