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| author | Stephen Boyd <sboyd@kernel.org> | 2025-05-28 23:03:20 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2025-05-28 23:03:20 -0700 |
| commit | b176dab2389c3c958ae14a44514fdecb42857b76 (patch) | |
| tree | 06966192a54120f6c4fe9b4a41726fd029b4c9a4 /include | |
| parent | 0af2f6be1b4281385b618cb86ad946eded089ac8 (diff) | |
| parent | 201bf08ba9e26eeb0a96ba3fd5c026f531b31aed (diff) | |
| download | linux-next-b176dab2389c3c958ae14a44514fdecb42857b76.tar.gz linux-next-b176dab2389c3c958ae14a44514fdecb42857b76.zip | |
Merge tag 'qcom-clk-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson:
- Camera clock controller driver for Qualcomm QCS8300
- Correct wait_val values for a variety of Qualcomm GDSCs
- Fix Qualcomm X Elite UFS clock settings
- Allow clkaN to be optional in the Qualcomm RPMh clock controller
driver if command db doesn't define it
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/qcom,sm6350-videocc.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,sm6350-videocc.h b/include/dt-bindings/clock/qcom,sm6350-videocc.h new file mode 100644 index 000000000000..2af7f91fa023 --- /dev/null +++ b/include/dt-bindings/clock/qcom,sm6350-videocc.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org> + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM6350_H +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM6350_H + +/* VIDEO_CC clocks */ +#define VIDEO_PLL0 0 +#define VIDEO_PLL0_OUT_EVEN 1 +#define VIDEO_CC_IRIS_AHB_CLK 2 +#define VIDEO_CC_IRIS_CLK_SRC 3 +#define VIDEO_CC_MVS0_AXI_CLK 4 +#define VIDEO_CC_MVS0_CORE_CLK 5 +#define VIDEO_CC_MVSC_CORE_CLK 6 +#define VIDEO_CC_MVSC_CTL_AXI_CLK 7 +#define VIDEO_CC_SLEEP_CLK 8 +#define VIDEO_CC_SLEEP_CLK_SRC 9 +#define VIDEO_CC_VENUS_AHB_CLK 10 + +/* GDSCs */ +#define MVSC_GDSC 0 +#define MVS0_GDSC 1 + +#endif |