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authorMark Brown <broonie@kernel.org>2026-07-27 13:39:15 +0100
committerMark Brown <broonie@kernel.org>2026-07-27 13:39:15 +0100
commit99075d51275cfd26166fbfdfe53785586945ad56 (patch)
tree6dbe0e6e06ee73a2d479844a2056991e328f62de /include
parent2ce60684348fe1c1b0de8fbaabeb7f8c30fe2f90 (diff)
parent959343d0e4d6da18debbf5e6f1a1e8f91f14f344 (diff)
downloadlinux-next-99075d51275cfd26166fbfdfe53785586945ad56.tar.gz
linux-next-99075d51275cfd26166fbfdfe53785586945ad56.zip
Merge branch 'for-next/core' of https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Diffstat (limited to 'include')
-rw-r--r--include/acpi/cppc_acpi.h7
-rw-r--r--include/linux/perf/arm_pmu.h2
2 files changed, 8 insertions, 1 deletions
diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
index 8693890a7275..5acebe62feac 100644
--- a/include/acpi/cppc_acpi.h
+++ b/include/acpi/cppc_acpi.h
@@ -176,6 +176,8 @@ extern int cppc_get_transition_latency(int cpu);
extern bool cpc_ffh_supported(void);
extern bool cpc_supported_by_cpu(void);
extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
+extern int cpc_read_ffh_fb_ctrs(int cpu, struct cpc_reg *reg1, u64 *val1,
+ struct cpc_reg *reg2, u64 *val2);
extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf);
extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
@@ -250,6 +252,11 @@ static inline int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
{
return -EOPNOTSUPP;
}
+static inline int cpc_read_ffh_fb_ctrs(int cpu, struct cpc_reg *reg1, u64 *val1,
+ struct cpc_reg *reg2, u64 *val2)
+{
+ return -EOPNOTSUPP;
+}
static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
{
return -EOPNOTSUPP;
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
index 52b37f7bdbf9..02d2c7f45b52 100644
--- a/include/linux/perf/arm_pmu.h
+++ b/include/linux/perf/arm_pmu.h
@@ -119,7 +119,7 @@ struct arm_pmu {
/* PMUv3 only */
int pmuver;
- bool has_smt;
+ bool avoid_pmccntr;
u64 reg_pmmir;
u64 reg_brbidr;
#define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40