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authorMark Brown <broonie@kernel.org>2026-10-01 15:33:44 +0100
committerMark Brown <broonie@kernel.org>2026-10-01 15:33:44 +0100
commit724dab6c5a718c77c4977a84d290006619887690 (patch)
tree7be00eb81c24c60a268a1ffe244873d6316d496b /include
parent01f6d70fe25ad1269d1d9a23a6ac5d84268db886 (diff)
parent3a6d690152557706cc3d44f6402d40c6c1ea7d74 (diff)
downloadlinux-next-724dab6c5a718c77c4977a84d290006619887690.tar.gz
linux-next-724dab6c5a718c77c4977a84d290006619887690.zip
Merge branch 'icc-next' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc.git
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/interconnect/qcom,kuno.h89
1 files changed, 89 insertions, 0 deletions
diff --git a/include/dt-bindings/interconnect/qcom,kuno.h b/include/dt-bindings/interconnect/qcom,kuno.h
new file mode 100644
index 000000000000..eacbae38f85d
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,kuno.h
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_KUNO_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_KUNO_H
+
+#define MASTER_SYS_TCU 0
+#define MASTER_LLCC 1
+#define MASTER_AUDIO 2
+#define MASTER_CPUCP 3
+#define MASTER_PCIE_RSCC 4
+#define MASTER_QDSS_BAM 5
+#define MASTER_QPIC 6
+#define MASTER_QUP_0 7
+#define MASTER_ANOC_SNOC 8
+#define MASTER_CNOC_DC_NOC 9
+#define MASTER_CNOC_SNOC 10
+#define MASTER_MSS_PROC 11
+#define MASTER_GEM_NOC_CFG 12
+#define MASTER_GEM_NOC_CNOC 13
+#define MASTER_GEM_NOC_PCIE_SNOC 14
+#define MASTER_ANOC_PCIE_GEM_NOC 15
+#define MASTER_SNOC_SF_MEM_NOC 16
+#define MASTER_QUP_CORE_0 17
+#define MASTER_CRYPTO 18
+#define MASTER_IPA 19
+#define MASTER_MSS_NAV 20
+#define MASTER_TME 21
+#define MASTER_APPSS_PROC 22
+#define MASTER_EMAC 23
+#define MASTER_IPA_PCIE 24
+#define MASTER_PCIE_0 25
+#define MASTER_QDSS_DAP 26
+#define MASTER_QDSS_ETR 27
+#define MASTER_QDSS_ETR_1 28
+#define MASTER_SDCC_4 29
+#define MASTER_USB3_0 30
+#define SLAVE_EBI1 31
+#define SLAVE_AHB2PHY 32
+#define SLAVE_AOSS 33
+#define SLAVE_APPSS 34
+#define SLAVE_AUDIO 35
+#define SLAVE_CLK_CTL 36
+#define SLAVE_RBCPR_CX_CFG 37
+#define SLAVE_RBCPR_MXA_CFG 38
+#define SLAVE_RBCPR_MXC_CFG 39
+#define SLAVE_CRYPTO_0_CFG 40
+#define SLAVE_EMAC_CFG 41
+#define SLAVE_IMEM_CFG 42
+#define SLAVE_IPA_CFG 43
+#define SLAVE_IPC_ROUTER_CFG 44
+#define SLAVE_LAGG_CFG 45
+#define SLAVE_MCCC_MASTER 46
+#define SLAVE_CNOC_MSS 47
+#define SLAVE_PCIE_0_CFG 48
+#define SLAVE_PCIE_RSC_CFG 49
+#define SLAVE_PDM 50
+#define SLAVE_PMU_WRAPPER_CFG 51
+#define SLAVE_PRNG 52
+#define SLAVE_QDSS_CFG 53
+#define SLAVE_QPIC 54
+#define SLAVE_QUP_0 55
+#define SLAVE_SDCC_4 56
+#define SLAVE_SPMI_VGI_COEX 57
+#define SLAVE_TCSR 58
+#define SLAVE_TLMM 59
+#define SLAVE_TME_CFG 60
+#define SLAVE_USB3 61
+#define SLAVE_VSENSE_CTRL_CFG 62
+#define SLAVE_A1NOC_CFG 63
+#define SLAVE_DDRSS_CFG 64
+#define SLAVE_LLCC 65
+#define SLAVE_GEM_NOC_CNOC 66
+#define SLAVE_SNOC_MEM_NOC_SF 67
+#define SLAVE_MEM_NOC_PCIE_SNOC 68
+#define SLAVE_ANOC_PCIE_GEM_NOC 69
+#define SLAVE_SNOC_CNOC 70
+#define SLAVE_ANOC_THROTTLE_CFG 71
+#define SLAVE_QUP_CORE_0 72
+#define SLAVE_BOOT_IMEM 73
+#define SLAVE_IMEM 74
+#define SLAVE_SERVICE_GEM_NOC 75
+#define SLAVE_PCIE_0 76
+#define SLAVE_QDSS_STM 77
+#define SLAVE_TCU 78
+
+#endif