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| author | Mark Brown <broonie@kernel.org> | 2026-09-14 15:21:17 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-09-14 15:21:17 +0100 |
| commit | 4c58752f6c3cc73699a57e15b80624a9adb4f237 (patch) | |
| tree | 26a8a5b55a363bb34f753195aa8a1e2d3c93bbd5 /include | |
| parent | 79516605540b3f25eb408b0be6de04887f88ac24 (diff) | |
| parent | 8fcbb04ee5152b303980b2b48d69c6f7f4094ca6 (diff) | |
| download | linux-next-4c58752f6c3cc73699a57e15b80624a9adb4f237.tar.gz linux-next-4c58752f6c3cc73699a57e15b80624a9adb4f237.zip | |
Merge branch 'mtd/next' of https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mtd/bbm.h | 2 | ||||
| -rw-r--r-- | include/linux/mtd/rawnand.h | 2 | ||||
| -rw-r--r-- | include/linux/mtd/sh_flctl.h | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index d890805f5494..67929fdf2dff 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -75,7 +75,7 @@ struct nand_bbt_descr { * with NAND_BBT_CREATE. */ #define NAND_BBT_CREATE_EMPTY 0x00000400 -/* Write bbt if neccecary */ +/* Write bbt if necessary */ #define NAND_BBT_WRITE 0x00002000 /* Read and write back block contents when writing bbt */ #define NAND_BBT_SAVECONTENT 0x00004000 diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 5c70e7bd3ed5..43fefff02025 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1592,7 +1592,7 @@ void nand_wait_ready(struct nand_chip *chip); /* * Free resources held by the NAND device, must be called on error after a - * sucessful nand_scan(). + * successful nand_scan(). */ void nand_cleanup(struct nand_chip *chip); diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h index 78fc2d4218c8..15adf2474fa0 100644 --- a/include/linux/mtd/sh_flctl.h +++ b/include/linux/mtd/sh_flctl.h @@ -60,8 +60,8 @@ * Some hardware uses bits called PULSEx instead of FCKSEL_E and QTSEL_E * to control the clock divider used between the High-Speed Peripheral Clock * and the FLCTL internal clock. If so, use CLK_8_BIT_xxx for connecting 8 bit - * and CLK_16_BIT_xxx for connecting 16 bit bus bandwith NAND chips. For the 16 - * bit version the divider is seperate for the pulse width of high and low + * and CLK_16_BIT_xxx for connecting 16 bit bus bandwidth NAND chips. For the 16 + * bit version the divider is separate for the pulse width of high and low * signals. */ #define PULSE3 (0x1 << 27) |
