diff options
| author | Yushan Wang <wangyushan12@huawei.com> | 2026-09-16 14:53:46 +0800 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2026-10-04 16:46:49 +0000 |
| commit | 4c226fa3238a941b925a266c5bdc5f494fa2b751 (patch) | |
| tree | 1c9647a2edc86087e568ba437393ccebe317ab0a /include | |
| parent | 93f51579e7df248780214094418f205253383cc5 (diff) | |
| download | linux-next-4c226fa3238a941b925a266c5bdc5f494fa2b751.tar.gz linux-next-4c226fa3238a941b925a266c5bdc5f494fa2b751.zip | |
drivers/perf: hisi: Consolidate uncore PMU cpuhp states
Every HiSilicon uncore PMU driver allocates its own static cpuhp state
even though they all register identical online/offline callbacks. This
wastes slots in the cpuhp state enum and needlessly fragments the
hotplug state space.
Move the cpuhp state setup into the shared hisi_uncore_pmu framework:
register a single dynamic state (CPUHP_AP_ONLINE_DYN) at framework
module init and export it for all HiSilicon uncore PMU drivers to use.
Drop the now-unused static CPUHP_AP_PERF_ARM_HISI_* entries from
include/linux/cpuhotplug.h.
The L3C PMU driver keeps a private dynamic state because it has its own
hotplug callbacks for migrating multiple per-CPU interrupt affinities,
but switches from its former static slot to CPUHP_AP_ONLINE_DYN for
consistency.
No intended functional changes.
Signed-off-by: Yushan Wang <wangyushan12@huawei.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/cpuhotplug.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index feb32949aeea..1b6dba159bb2 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -209,12 +209,6 @@ enum cpuhp_state { CPUHP_AP_PERF_S390_SF_ONLINE, CPUHP_AP_PERF_ARM_CCI_ONLINE, CPUHP_AP_PERF_ARM_CCN_ONLINE, - CPUHP_AP_PERF_ARM_HISI_CPA_ONLINE, - CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE, - CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, - CPUHP_AP_PERF_ARM_HISI_L3_ONLINE, - CPUHP_AP_PERF_ARM_HISI_PA_ONLINE, - CPUHP_AP_PERF_ARM_HISI_SLLC_ONLINE, CPUHP_AP_PERF_ARM_HISI_PCIE_PMU_ONLINE, CPUHP_AP_PERF_ARM_HNS3_PMU_ONLINE, CPUHP_AP_PERF_ARM_L2X0_ONLINE, |