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| author | Iustin Stolniceanu <iustin.stolniceanu@analog.com> | 2026-11-11 12:00:53 +0200 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-11-12 10:58:03 -0800 |
| commit | df501db9b18fae4d3edd534b992675f4673a938e (patch) | |
| tree | ab4a97d2bf517ad8b45a39fca165ccf74b2dea2c /include/uapi/linux | |
| parent | 3962ded998c1df8a449fdf986f44f478e9c09675 (diff) | |
| download | linux-next-df501db9b18fae4d3edd534b992675f4673a938e.tar.gz linux-next-df501db9b18fae4d3edd534b992675f4673a938e.zip | |
net: phy: c45: select BASE-T1 type for the forced speed
Commit 25108a834e14 ("net: phy: c45: add support for 1000BASE-T1 forced
setup") made genphy_c45_pma_setup_forced() write the type selection
field (bits 3:0) of the BASE-T1 PMA/PMD control register (1.2100) on
every forced setup: 1000BASE-T1 for SPEED_1000, and 0 for everything
else. 0 selects 100BASE-T1, so forcing a 10BASE-T1L PHY to 10 Mbit/s
now also switches its PMA to 100BASE-T1, a mode it does not implement.
Seen on an ADIN1110 (internal ADIN1100 PHY): after
ethtool -s ethX autoneg off speed 10 master-slave forced-master
1.2100 reads 0xc000 instead of the 0xc002. Since the field is not
restored by re-enabling autoneg, the PHY keeps the wrong type until
the next forced setup or reset.
Add a helper that returns the type selection value for the forced speed
and the supported link modes: 100BASE-T1, 1000BASE-T1, and 10BASE-T1L or
10BASE-T1S for SPEED_10 depending on the supported 10 Mbit/s modes. Fail
with -EINVAL when no type matches instead of writing 100BASE-T1. This
also applies to forced 2.5G, 5G and 10G on BASE-T1 capable PHYs, for
which there are no link modes yet.
The field is called "type selection" in IEEE 802.3-2022 (45.2.1.214,
Table 45-178). Keep the old STRAP names as aliases.
Tested on EVAL-ADIN1110EBZ: with this change, forcing 10 Mbit/s writes
1.2100 = 0xc002 (10BASE-T1L) instead of the invalid 0xc000.
Fixes: 25108a834e14 ("net: phy: c45: add support for 1000BASE-T1 forced setup")
Signed-off-by: Iustin Stolniceanu <iustin.stolniceanu@analog.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20261111100053.345196-1-iustin.stolniceanu@analog.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/uapi/linux')
| -rw-r--r-- | include/uapi/linux/mdio.h | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h index 06f4bc3c20c7..2806f60ed105 100644 --- a/include/uapi/linux/mdio.h +++ b/include/uapi/linux/mdio.h @@ -417,8 +417,17 @@ #define MDIO_AN_10BT1_AN_STAT_LPA_EEE_T1L 0x4000 /* 10BASE-T1L LP EEE ability advertisement */ /* BASE-T1 PMA/PMD control register */ -#define MDIO_PMA_PMD_BT1_CTRL_STRAP 0x000F /* Type selection (Strap) */ -#define MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000 0x0001 /* Select 1000BASE-T1 */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL 0x000F /* Type selection */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_100BT1 0x0000 /* Select 100BASE-T1 */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_1000BT1 0x0001 /* Select 1000BASE-T1 */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_10BT1L 0x0002 /* Select 10BASE-T1L */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_10BT1S 0x0003 /* Select 10BASE-T1S */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_2P5GBT1 0x0004 /* Select 2.5GBASE-T1 */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_5GBT1 0x0005 /* Select 5GBASE-T1 */ +#define MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_10GBT1 0x0006 /* Select 10GBASE-T1 */ +/* Legacy names, kept for userspace */ +#define MDIO_PMA_PMD_BT1_CTRL_STRAP MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL +#define MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000 MDIO_PMA_PMD_BT1_CTRL_TYPE_SEL_1000BT1 #define MDIO_PMA_PMD_BT1_CTRL_CFG_MST 0x4000 /* MASTER-SLAVE config value */ /* 1000BASE-T1 PCS control register */ |