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| author | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2026-05-20 17:51:31 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-05 14:37:23 -0500 |
| commit | 5a9f4c535ae05facd4f6ef116b18062f9f2ad768 (patch) | |
| tree | ee15c45c96d0c811ca7d758487cc0392f0110851 /include/linux/soc | |
| parent | e7012ac2fc000fe7ae3e58a7449b80fa955b124a (diff) | |
| download | linux-next-5a9f4c535ae05facd4f6ef116b18062f9f2ad768.tar.gz linux-next-5a9f4c535ae05facd4f6ef116b18062f9f2ad768.zip | |
soc: qcom: ubwc: drop ubwc_bank_spread
According to the documentation, UBWC bank spreading should be enabled
for all targets. It's just not all targets have separate bit to control
it. Drop the bit from the database and make the helper always return
true. If we need to change it later, the helper can be adjusted
according to the programming guides.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-24-72f2749bc807@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'include/linux/soc')
| -rw-r--r-- | include/linux/soc/qcom/ubwc.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h index c3f9efae5db8..254721f5ea3c 100644 --- a/include/linux/soc/qcom/ubwc.h +++ b/include/linux/soc/qcom/ubwc.h @@ -33,7 +33,6 @@ struct qcom_ubwc_cfg_data { * DDR bank. This should ideally use DRAM type detection. */ int highest_bank_bit; - bool ubwc_bank_spread; /** * @macrotile_mode: Macrotile Mode @@ -85,7 +84,7 @@ static inline bool qcom_ubwc_macrotile_mode(const struct qcom_ubwc_cfg_data *cfg static inline bool qcom_ubwc_bank_spread(const struct qcom_ubwc_cfg_data *cfg) { - return cfg->ubwc_bank_spread; + return true; } static inline u32 qcom_ubwc_swizzle(const struct qcom_ubwc_cfg_data *cfg) |