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| author | Anup Patel <apatel@ventanamicro.com> | 2024-03-07 19:33:00 +0530 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2024-03-25 17:38:28 +0100 |
| commit | 21a8f8a0eb35ceb21e2c9ddd87468bc3b5ac87c0 (patch) | |
| tree | 47892ae5a864d6d29b07809450d5270c320de59e /include/linux/cpuhotplug.h | |
| parent | 0151a8db49b0a88f967dca0ea5ae2bee2d67b22a (diff) | |
| download | linux-next-21a8f8a0eb35ceb21e2c9ddd87468bc3b5ac87c0.tar.gz linux-next-21a8f8a0eb35ceb21e2c9ddd87468bc3b5ac87c0.zip | |
irqchip: Add RISC-V incoming MSI controller early driver
The RISC-V advanced interrupt architecture (AIA) specification
defines a new MSI controller called incoming message signalled
interrupt controller (IMSIC) which manages MSI on per-HART (or
per-CPU) basis. It also supports IPIs as software injected MSIs.
(For more details refer https://github.com/riscv/riscv-aia)
Add an early irqchip driver for RISC-V IMSIC which sets up the
IMSIC state and provide IPIs.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Björn Töpel <bjorn@rivosinc.com>
Reviewed-by: Björn Töpel <bjorn@rivosinc.com>
Link: https://lore.kernel.org/r/20240307140307.646078-3-apatel@ventanamicro.com
Diffstat (limited to 'include/linux/cpuhotplug.h')
| -rw-r--r-- | include/linux/cpuhotplug.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index 35e78ddb2b37..7a5785f405b6 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -146,6 +146,7 @@ enum cpuhp_state { CPUHP_AP_IRQ_MIPS_GIC_STARTING, CPUHP_AP_IRQ_LOONGARCH_STARTING, CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING, + CPUHP_AP_IRQ_RISCV_IMSIC_STARTING, CPUHP_AP_ARM_MVEBU_COHERENCY, CPUHP_AP_PERF_X86_AMD_UNCORE_STARTING, CPUHP_AP_PERF_X86_STARTING, |