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authorSascha Bischoff <Sascha.Bischoff@arm.com>2026-09-04 11:49:01 +0000
committerMarc Zyngier <maz@kernel.org>2026-09-14 10:49:09 +0100
commitaf4d5229bf674b2554b825c79a71d1caa0088219 (patch)
tree8c1ef97537e1c8a63667621d40da117896d9e955 /include/kvm
parentf549eb53494f096b1b39b58954244b6c17ea58ef (diff)
downloadlinux-next-af4d5229bf674b2554b825c79a71d1caa0088219.tar.gz
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KVM: arm64: gic-v5: Add GICv5 SPI injection to irqfd
Now that there is support for GICv5 SPIs in KVM, update vgic_irqfd_set_irq() to translate irqchip pins into GICv5 SPI IntIDs before injecting them. Validate IRQCHIP route pins against the GIC model. GICv2 and GICv3 only support 988 pins for SPIs 32 through 1019, while KVM supports up to 1024 GICv5 SPI pins. The common routing table is sized for the largest supported range. Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Link: https://patch.msgid.link/20260904113404.4051341-30-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
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