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| author | Steve French <sfrench@us.ibm.com> | 2005-11-09 14:33:22 -0800 |
|---|---|---|
| committer | Steve French <sfrench@us.ibm.com> | 2005-11-09 14:33:22 -0800 |
| commit | e82b3aec8d508d2a925a4c766e97f16b7c4dfb1b (patch) | |
| tree | 69d5685ef0c194f651a03e30bff14628b4d45400 /include/asm-arm/arch-realview/entry-macro.S | |
| parent | ec58ef03284f0bfa50a04982b74c8c2325a0758e (diff) | |
| parent | ad8f76be48d817b48222411ae16a7dfe257bdb24 (diff) | |
| download | linux-next-e82b3aec8d508d2a925a4c766e97f16b7c4dfb1b.tar.gz linux-next-e82b3aec8d508d2a925a4c766e97f16b7c4dfb1b.zip | |
Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Diffstat (limited to 'include/asm-arm/arch-realview/entry-macro.S')
| -rw-r--r-- | include/asm-arm/arch-realview/entry-macro.S | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S index 2712ba77bb3a..6288fad0dc41 100644 --- a/include/asm-arm/arch-realview/entry-macro.S +++ b/include/asm-arm/arch-realview/entry-macro.S @@ -47,3 +47,28 @@ cmpcs \irqnr, \irqnr .endm + + /* We assume that irqstat (the raw value of the IRQ acknowledge + * register) is preserved from the macro above. + * If there is an IPI, we immediately signal end of interrupt on the + * controller, since this requires the original irqstat value which + * we won't easily be able to recreate later. + */ + + .macro test_for_ipi, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + cmp \irqnr, #16 + strcc \irqstat, [\base, #GIC_CPU_EOI] + cmpcs \irqnr, \irqnr + .endm + + /* As above, this assumes that irqstat and base are preserved.. */ + + .macro test_for_ltirq, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + mov \tmp, #0 + cmp \irqnr, #29 + moveq \tmp, #1 + streq \irqstat, [\base, #GIC_CPU_EOI] + cmp \tmp, #0 + .endm |