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authorAkshay Gupta <Akshay.Gupta@amd.com>2026-03-18 16:57:09 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-04-02 16:17:29 +0200
commitb5e7fb39819aec09a27c89f203774ffc6b13a78d (patch)
tree0c3a1c43be9835a1943d45ce56856b391657e38f /drivers
parentac7460c6037e45c72703cbe9a96ee6668601c80f (diff)
downloadlinux-next-b5e7fb39819aec09a27c89f203774ffc6b13a78d.tar.gz
linux-next-b5e7fb39819aec09a27c89f203774ffc6b13a78d.zip
misc: amd-sbi: Add revision support for AMD Venice platform
The AMD Venice platform uses revision 0x31 and a two-byte register address size. Add the revision to the CPUID and MCAMSR protocol functions to ensure correct protocol identification. Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Signed-off-by: Akshay Gupta <Akshay.Gupta@amd.com> Link: https://patch.msgid.link/20260318112711.2757467-1-Akshay.Gupta@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/misc/amd-sbi/rmi-core.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/misc/amd-sbi/rmi-core.c b/drivers/misc/amd-sbi/rmi-core.c
index 6979bfd7da64..d4238ebad3c6 100644
--- a/drivers/misc/amd-sbi/rmi-core.c
+++ b/drivers/misc/amd-sbi/rmi-core.c
@@ -214,6 +214,7 @@ static int rmi_cpuid_read(struct sbrmi_data *data,
goto exit_unlock;
break;
case 0x21:
+ case 0x31:
ret = rmi_cpuid_input_ext(data, msg, thread);
if (ret)
goto exit_unlock;
@@ -327,6 +328,7 @@ static int rmi_mca_msr_read(struct sbrmi_data *data,
goto exit_unlock;
break;
case 0x21:
+ case 0x31:
ret = rmi_mcamsr_input_ext(data, msg, thread);
if (ret)
goto exit_unlock;