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| author | Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2026-03-26 11:24:46 -0700 |
|---|---|---|
| committer | Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> | 2026-03-31 18:45:11 +0300 |
| commit | 8e0a2fc68ec369f2b6755994da1d318d0898a9d9 (patch) | |
| tree | ed838305150de1f19729f51c6848f1a3aa3d2742 /drivers | |
| parent | 9ec6bf62cf98e30c7126a0f51ee7cdf2e8d458b6 (diff) | |
| download | linux-next-8e0a2fc68ec369f2b6755994da1d318d0898a9d9.tar.gz linux-next-8e0a2fc68ec369f2b6755994da1d318d0898a9d9.zip | |
platform/x86/intel/tpmi: Use 32 bit aligned address for debugfs mem write
The memory write feature supports 32-bit writes to any TPMI offset.
However, future hardware generations may not allow writes to non-32-bit
aligned addresses due to hardware optimizations.
Since all TPMI addresses are 64-bit aligned and correspond to 64-bit
registers, enforce 32-bit alignment for write operations.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://patch.msgid.link/20260326182446.3478672-1-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/platform/x86/intel/vsec_tpmi.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/platform/x86/intel/vsec_tpmi.c b/drivers/platform/x86/intel/vsec_tpmi.c index 9dddf4e5863e..7fc6ff8d1040 100644 --- a/drivers/platform/x86/intel/vsec_tpmi.c +++ b/drivers/platform/x86/intel/vsec_tpmi.c @@ -46,6 +46,7 @@ * provided by the Intel VSEC driver. */ +#include <linux/align.h> #include <linux/auxiliary_bus.h> #include <linux/bitfield.h> #include <linux/debugfs.h> @@ -479,6 +480,9 @@ static ssize_t mem_write(struct file *file, const char __user *userbuf, size_t l addr = array[2]; value = array[3]; + if (!IS_ALIGNED(addr, sizeof(u32))) + return -EINVAL; + if (punit >= pfs->pfs_header.num_entries) { ret = -EINVAL; goto exit_write; |