diff options
| author | Faiyaz Mohammed <faiyaz.mohammed@oss.qualcomm.com> | 2026-07-13 15:28:52 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-17 17:22:44 -0500 |
| commit | 43584144a46bccbe90482cd8eede9596d8fc47dc (patch) | |
| tree | 6beb03651d2c6392fe64d97dc15cdf3e12395065 /drivers/soc | |
| parent | 26ead60b1a2722627759dc8c279ed336826bb5e1 (diff) | |
| download | linux-next-43584144a46bccbe90482cd8eede9596d8fc47dc.tar.gz linux-next-43584144a46bccbe90482cd8eede9596d8fc47dc.zip | |
soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-configured by DSF
On Shikra, the DDR System Firmware (DSF) configures ECC interrupt
routing before the kernel driver probes — it enables Tag/Data RAM
interrupts and programs error thresholds in the LLCC interrupt-enable
registers.
Set irq_configured in shikra_cfg so that qcom_llcc_edac_probe() skips
calling qcom_llcc_core_setup(), which would otherwise overwrite the
firmware-managed register state with redundant writes.
Signed-off-by: Faiyaz Mohammed <faiyaz.mohammed@oss.qualcomm.com>
Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Reviewed-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260713-shikra-edac-v2-1-22fcb3ca9fb9@qti.qualcomm.com
[bjorn: Changed subject prefix]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/qcom/llcc-qcom.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 22c8099cf6bb..733999867bbf 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -4595,6 +4595,7 @@ static const struct qcom_llcc_config shikra_cfg[] = { .size = ARRAY_SIZE(shikra_data), .reg_offset = llcc_v2_1_reg_offset, .edac_reg_offset = &llcc_v2_1_edac_reg_offset, + .irq_configured = true, }, }; |