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authorJacky Huang <ychuang3@nuvoton.com>2024-05-21 01:24:47 +0000
committerLinus Walleij <linus.walleij@linaro.org>2024-06-17 09:22:03 +0200
commitf805e356313bbcafef48808c14eb9ce7f4ff2560 (patch)
tree425823452e06fead966ef6d91126f3ea16d7537e /drivers/pinctrl/nuvoton/Kconfig
parent63f1f9da457aefb0e4dce93fd27a404990734054 (diff)
downloadlinux-next-f805e356313bbcafef48808c14eb9ce7f4ff2560.tar.gz
linux-next-f805e356313bbcafef48808c14eb9ce7f4ff2560.zip
pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver
Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and add support for ma35d1 pinctrl. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/nuvoton/Kconfig')
-rw-r--r--drivers/pinctrl/nuvoton/Kconfig19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/pinctrl/nuvoton/Kconfig b/drivers/pinctrl/nuvoton/Kconfig
index 2abbfcec1fae..7eadaaf48d6e 100644
--- a/drivers/pinctrl/nuvoton/Kconfig
+++ b/drivers/pinctrl/nuvoton/Kconfig
@@ -45,3 +45,22 @@ config PINCTRL_NPCM8XX
Say Y or M here to enable pin controller and GPIO support for
the Nuvoton NPCM8XX SoC. This is strongly recommended when
building a kernel that will run on this chip.
+
+config PINCTRL_MA35
+ bool
+ depends on (ARCH_MA35 || COMPILE_TEST) && OF
+ select GENERIC_PINCTRL_GROUPS
+ select GENERIC_PINMUX_FUNCTIONS
+ select GENERIC_PINCONF
+ select GPIOLIB
+ select GPIO_GENERIC
+ select GPIOLIB_IRQCHIP
+ select MFD_SYSCON
+
+config PINCTRL_MA35D1
+ bool "Pinctrl and GPIO driver for Nuvoton MA35D1"
+ depends on (ARCH_MA35 || COMPILE_TEST) && OF
+ select PINCTRL_MA35
+ help
+ Say Y here to enable pin controller and GPIO support
+ for Nuvoton MA35D1 SoC.