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| author | Thomas Zimmermann <tzimmermann@suse.de> | 2026-06-18 14:28:41 +0200 |
|---|---|---|
| committer | Thomas Zimmermann <tzimmermann@suse.de> | 2026-06-24 08:57:27 +0200 |
| commit | 47decb5e9453940dfcfd64d72f565ed9783f3055 (patch) | |
| tree | c53f19fd2e737d940b35006c424d8c80e2b59448 /drivers/gpu | |
| parent | 0e682e136c466ae37c62f18099f591c096260ee0 (diff) | |
| download | linux-next-47decb5e9453940dfcfd64d72f565ed9783f3055.tar.gz linux-next-47decb5e9453940dfcfd64d72f565ed9783f3055.zip | |
drm/hibmc: Store fb in variable in atomic_update
The atomic-update helper frequently refers to the framebuffer in
new_state->fb. Store it in a local variable to make the code more
readable. No functional changes.
Suggested-by: Yongbang Shi <shiyongbang@huawei.com>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Yongbang Shi <shiyongbang@huawei.com>
Link: https://patch.msgid.link/20260618123142.92298-4-tzimmermann@suse.de
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c index 2e6e189bec1a..19cb16a7daf9 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c @@ -100,18 +100,18 @@ static int hibmc_plane_atomic_check(struct drm_plane *plane, static void hibmc_plane_atomic_update(struct drm_plane *plane, struct drm_atomic_commit *state) { - struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, - plane); + struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); + struct drm_framebuffer *fb = new_state->fb; u32 reg; s64 gpu_addr = 0; u32 line_l; struct hibmc_drm_private *priv = to_hibmc_drm_private(plane->dev); struct drm_gem_vram_object *gbo; - if (!new_state->fb) + if (!fb) return; - gbo = drm_gem_vram_of_gem(new_state->fb->obj[0]); + gbo = drm_gem_vram_of_gem(fb->obj[0]); gpu_addr = drm_gem_vram_offset(gbo); if (WARN_ON_ONCE(gpu_addr < 0)) @@ -119,9 +119,9 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane, writel(gpu_addr, priv->mmio + HIBMC_CRT_FB_ADDRESS); - reg = new_state->fb->width * (new_state->fb->format->cpp[0]); + reg = fb->width * fb->format->cpp[0]; - line_l = new_state->fb->pitches[0]; + line_l = fb->pitches[0]; writel(HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_WIDTH, reg) | HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_OFFS, line_l), priv->mmio + HIBMC_CRT_FB_WIDTH); @@ -129,8 +129,7 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane, /* SET PIXEL FORMAT */ reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL); reg &= ~HIBMC_CRT_DISP_CTL_FORMAT_MASK; - reg |= HIBMC_FIELD(HIBMC_CRT_DISP_CTL_FORMAT, - new_state->fb->format->cpp[0] * 8 / 16); + reg |= HIBMC_FIELD(HIBMC_CRT_DISP_CTL_FORMAT, fb->format->cpp[0] * 8 / 16); writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL); } |