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| author | Alexandre Courbot <acourbot@nvidia.com> | 2026-03-25 11:46:19 +0900 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2026-03-26 15:08:28 +0900 |
| commit | 1a8f58c5e125d61c597d420237750d2dcea32ce8 (patch) | |
| tree | c0104f6fc5c5bfaacf201db5b35a536ef4a1f911 /drivers/gpu/nova-core/fb/hal | |
| parent | ffabad08e46e425781a5d3a7f9e6a64c12e36de2 (diff) | |
| download | linux-next-1a8f58c5e125d61c597d420237750d2dcea32ce8.tar.gz linux-next-1a8f58c5e125d61c597d420237750d2dcea32ce8.zip | |
gpu: nova-core: convert FUSE registers to kernel register macro
Convert all FUSE registers to use the kernel's register macro and update
the code accordingly.
Reviewed-by: Eliot Courtney <ecourtney@nvidia.com>
Reviewed-by: Gary Guo <gary@garyguo.net>
Acked-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20260325-b4-nova-register-v4-6-bdf172f0f6ca@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Diffstat (limited to 'drivers/gpu/nova-core/fb/hal')
| -rw-r--r-- | drivers/gpu/nova-core/fb/hal/ga100.rs | 3 | ||||
| -rw-r--r-- | drivers/gpu/nova-core/fb/hal/tu102.rs | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/nova-core/fb/hal/ga100.rs b/drivers/gpu/nova-core/fb/hal/ga100.rs index 629588c75778..1c03783cddef 100644 --- a/drivers/gpu/nova-core/fb/hal/ga100.rs +++ b/drivers/gpu/nova-core/fb/hal/ga100.rs @@ -40,7 +40,8 @@ pub(super) fn write_sysmem_flush_page_ga100(bar: &Bar0, addr: u64) { } pub(super) fn display_enabled_ga100(bar: &Bar0) -> bool { - !regs::ga100::NV_FUSE_STATUS_OPT_DISPLAY::read(bar).display_disabled() + !bar.read(regs::ga100::NV_FUSE_STATUS_OPT_DISPLAY) + .display_disabled() } /// Shift applied to the sysmem address before it is written into diff --git a/drivers/gpu/nova-core/fb/hal/tu102.rs b/drivers/gpu/nova-core/fb/hal/tu102.rs index 515d50872224..281bb796e198 100644 --- a/drivers/gpu/nova-core/fb/hal/tu102.rs +++ b/drivers/gpu/nova-core/fb/hal/tu102.rs @@ -29,7 +29,8 @@ pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result { } pub(super) fn display_enabled_gm107(bar: &Bar0) -> bool { - !regs::gm107::NV_FUSE_STATUS_OPT_DISPLAY::read(bar).display_disabled() + !bar.read(regs::gm107::NV_FUSE_STATUS_OPT_DISPLAY) + .display_disabled() } pub(super) fn vidmem_size_gp102(bar: &Bar0) -> u64 { |