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| author | Imre Deak <imre.deak@intel.com> | 2026-07-01 18:31:48 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2026-07-09 10:37:49 +0300 |
| commit | 15c441a3e8151fc27e582904fd583214aebb2937 (patch) | |
| tree | 99e7d162ca37ecd821fe341ea152a825f1328e39 /drivers/gpu/drm | |
| parent | 4f104fc10a461684bbc72d51ffa56707749dc6fd (diff) | |
| download | linux-next-15c441a3e8151fc27e582904fd583214aebb2937.tar.gz linux-next-15c441a3e8151fc27e582904fd583214aebb2937.zip | |
drm/i915/dp: Use link caps for eDP DSC config selection
Use the link caps helper to select the maximum eDP link configuration
for DSC computation, instead of using the separate max rate and lane
count limits, which may not form a valid configuration after individual
configs are disabled by fallback.
This is a step towards unifying configuration selection and iteration
across connector types and between compute and fallback paths.
The state computation should likely consider all allowed configurations,
as noted in the code comment; for now keep the existing eDP DSC behavior
of selecting the maximum configuration determined by the eDP connector
rate / lane config iteration order.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260701153204.4124150-20-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d9c31be6bab7..47888e682ec7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2209,7 +2209,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, int pipe_bpp) { struct intel_display *display = to_intel_display(intel_dp); - const struct intel_connector *connector = to_intel_connector(conn_state->connector); + struct intel_connector *connector = to_intel_connector(conn_state->connector); int min_bpp_x16, max_bpp_x16, bpp_step_x16; int bpp_x16; int ret; @@ -2221,8 +2221,19 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, max_bpp_x16 = align_max_compressed_bpp_x16(connector, pipe_config->output_format, pipe_bpp, max_bpp_x16); if (intel_dp_is_edp(intel_dp)) { - pipe_config->port_clock = limits->max_rate; - pipe_config->lane_count = limits->max_lane_count; + struct intel_dp_link_config max_link_config; + + /* + * FIXME: Clarify why eDP does not use the regular SST BW + * check and instead always uses the maximum link config, + * regardless of intel_dp::use_max_params. Then unify this eDP + * path with the regular DP path. + */ + if (!intel_dp_get_connector_max_link_config(connector, limits, &max_link_config)) + return -EINVAL; + + pipe_config->port_clock = max_link_config.rate; + pipe_config->lane_count = max_link_config.lane_count; pipe_config->dsc.compressed_bpp_x16 = max_bpp_x16; |