diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2023-04-19 15:49:09 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-19 18:31:41 -0500 |
| commit | 79f2432e3138a3240a99441fc077181e2e8c8fb9 (patch) | |
| tree | cd41ec18c67dce6a90b3f21f6b05621c91bea137 /drivers/gpu/drm/xe/xe_reg_sr.c | |
| parent | fa4fe0db0885b089200cc336207e40f6902ebbb2 (diff) | |
| download | linux-next-79f2432e3138a3240a99441fc077181e2e8c8fb9.tar.gz linux-next-79f2432e3138a3240a99441fc077181e2e8c8fb9.zip | |
drm/xe/sr: Apply masked registers properly
The 'clear' field for register save/restore entries was being placed in
the value bits of the register rather than the mask bits; make sure it
gets shifted into the mask bits.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230419224909.4000920-1-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_reg_sr.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_reg_sr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c index ff83da4cf4a7..e38397fc771a 100644 --- a/drivers/gpu/drm/xe/xe_reg_sr.c +++ b/drivers/gpu/drm/xe/xe_reg_sr.c @@ -148,7 +148,7 @@ static void apply_one_mmio(struct xe_gt *gt, u32 reg, * supposed to set all bits. */ if (entry->masked_reg) - val = (entry->clr_bits ?: entry->set_bits << 16); + val = (entry->clr_bits ?: entry->set_bits) << 16; else if (entry->clr_bits + 1) val = (entry->reg_type == XE_RTP_REG_MCR ? xe_gt_mcr_unicast_read_any(gt, MCR_REG(reg)) : |