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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-03-31 18:42:49 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-04-01 17:02:36 +0300 |
| commit | 81dbca71885df32b0683104d1f49065d792870e0 (patch) | |
| tree | 491aacef8e2b17588f3c057d0381fde1ccf9d2c9 /drivers/gpu/drm/xe/Makefile | |
| parent | bf64bcf4baab24944be3f6252192abb87af84686 (diff) | |
| download | linux-next-81dbca71885df32b0683104d1f49065d792870e0.tar.gz linux-next-81dbca71885df32b0683104d1f49065d792870e0.zip | |
drm/i915/mchbar: Provide intel_mchbar_read*() abstraction
MCHBAR registers are a bit special in that:
- we access them through the mirror
- the mirror is read only on HSW+
- the mirror requires the actual MCHBAR to be enabled in device 0:0.0
- the mirror is gone on MTL+
So I'd prefer to treat MCHBAR registers as a bit special in
the code as well, and do all accesses to them via dedicated
functions. Prodive such functions in the form of
intel_mchbar_read*().
v2: Put the function arguments on one line
No intel_uncore_read64() on xe, use intel_uncore_read64_2x32()
Name the new function intel_mchbar_read64_2x32() as well
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260331154259.24600-3-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/xe/Makefile')
| -rw-r--r-- | drivers/gpu/drm/xe/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index 3bbd45ea327a..015ca5412f86 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -304,6 +304,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \ i915-display/intel_link_bw.o \ i915-display/intel_lspcon.o \ i915-display/intel_lt_phy.o \ + i915-display/intel_mchbar.o \ i915-display/intel_modeset_lock.o \ i915-display/intel_modeset_setup.o \ i915-display/intel_modeset_verify.o \ |