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authorDale Whinham <daleyo@gmail.com>2025-12-18 00:19:32 +0000
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>2026-01-06 05:30:08 +0200
commited100aa239be6bd7d660873674224cc6f75b3f50 (patch)
tree486e1033b6430f339964c4b29d9543d80364d8dc /drivers/gpu/drm/msm/dp/dp_panel.c
parent794b0e68caba49b950b42ec32e364028c2facf57 (diff)
downloadlinux-next-ed100aa239be6bd7d660873674224cc6f75b3f50.tar.gz
linux-next-ed100aa239be6bd7d660873674224cc6f75b3f50.zip
drm/msm/dp: Enable support for eDP v1.4+ link rates table
The MSM DRM driver currently does not support panels which report their supported link rates via the SUPPORTED_LINK_RATES table. For panels which do not offer the optional eDP v1.3 fallback via MAX_LINK_RATE, this will cause a panel probe failure (e.g. Samsung ATNA30DW01-1 as found in Microsoft Surface Pro 11). Detect eDP v1.4 panels and parse the SUPPORTED_LINK_RATES table when present. Additionally, set the rate using LINK_RATE_SET instead of LINK_BW_SET, but only if LINK_BW_SET hasn't already been written to. Signed-off-by: Dale Whinham <daleyo@gmail.com> Tested-by: Jérôme de Bretagne <jerome.debretagne@gmail.com> Tested-by: Steev Klimaszewski <threeway@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/695064/ Link: https://lore.kernel.org/r/20251218-drm-msm-edp14-v2-1-2e56c2338ab1@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Diffstat (limited to 'drivers/gpu/drm/msm/dp/dp_panel.c')
-rw-r--r--drivers/gpu/drm/msm/dp/dp_panel.c93
1 files changed, 82 insertions, 11 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c
index ad5d55bf009d..891211b23202 100644
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_panel.c
@@ -13,6 +13,8 @@
#include <drm/drm_print.h>
#include <linux/io.h>
+#include <linux/types.h>
+#include <asm/byteorder.h>
#define DP_INTF_CONFIG_DATABUS_WIDEN BIT(4)
@@ -107,29 +109,98 @@ static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel)
drm_dbg_dp(panel->drm_dev, "max_lanes=%d max_link_rate=%d\n",
link->max_dp_lanes, link->max_dp_link_rate);
- link_info->rate = drm_dp_max_link_rate(dpcd);
+ max_lttpr_lanes = drm_dp_lttpr_max_lane_count(link->lttpr_common_caps);
+ max_lttpr_rate = drm_dp_lttpr_max_link_rate(link->lttpr_common_caps);
+
+ /* eDP sink */
+ if (msm_dp_panel->dpcd[DP_EDP_CONFIGURATION_CAP]) {
+ u8 edp_rev;
+
+ rc = drm_dp_dpcd_read_byte(panel->aux, DP_EDP_DPCD_REV, &edp_rev);
+ if (rc)
+ return rc;
+
+ drm_dbg_dp(panel->drm_dev, "edp_rev=0x%x\n", edp_rev);
+
+ /* For eDP v1.4+, parse the SUPPORTED_LINK_RATES table */
+ if (edp_rev >= DP_EDP_14) {
+ __le16 rates[DP_MAX_SUPPORTED_RATES];
+ u8 bw_set;
+ int i;
+
+ rc = drm_dp_dpcd_read_data(panel->aux, DP_SUPPORTED_LINK_RATES,
+ rates, sizeof(rates));
+ if (rc)
+ return rc;
+
+ rc = drm_dp_dpcd_read_byte(panel->aux, DP_LINK_BW_SET, &bw_set);
+ if (rc)
+ return rc;
+
+ /* Find index of max supported link rate that does not exceed dtsi limits */
+ for (i = 0; i < ARRAY_SIZE(rates); i++) {
+ /*
+ * The value from the DPCD multiplied by 200 gives
+ * the link rate in kHz. Divide by 10 to convert to
+ * symbol rate, accounting for 8b/10b encoding.
+ */
+ u32 rate = (le16_to_cpu(rates[i]) * 200) / 10;
+
+ if (!rate)
+ break;
+
+ drm_dbg_dp(panel->drm_dev,
+ "SUPPORTED_LINK_RATES[%d]: %d\n", i, rate);
+
+ /*
+ * Limit link rate from link-frequencies of endpoint
+ * property of dtsi
+ */
+ if (rate > link->max_dp_link_rate)
+ break;
+
+ /* Limit link rate from LTTPR capabilities, if any */
+ if (max_lttpr_rate && rate > max_lttpr_rate)
+ break;
+
+ link_info->rate = rate;
+ link_info->supported_rates[i] = rate;
+ link_info->rate_set = i;
+ }
+
+ /* Only use LINK_RATE_SET if LINK_BW_SET hasn't already been written to */
+ if (!bw_set && link_info->rate)
+ link_info->use_rate_set = true;
+ }
+ }
+
+ /* Fall back on MAX_LINK_RATE/LINK_BW_SET (DP, eDP <= v1.3) */
+ if (!link_info->rate) {
+ link_info->rate = drm_dp_max_link_rate(dpcd);
+
+ /* Limit link rate from link-frequencies of endpoint property of dtsi */
+ if (link_info->rate > link->max_dp_link_rate)
+ link_info->rate = link->max_dp_link_rate;
+
+ /* Limit link rate from LTTPR capabilities, if any */
+ if (max_lttpr_rate && max_lttpr_rate < link_info->rate)
+ link_info->rate = max_lttpr_rate;
+ }
+
link_info->num_lanes = drm_dp_max_lane_count(dpcd);
/* Limit data lanes from data-lanes of endpoint property of dtsi */
if (link_info->num_lanes > link->max_dp_lanes)
link_info->num_lanes = link->max_dp_lanes;
- /* Limit link rate from link-frequencies of endpoint property of dtsi */
- if (link_info->rate > link->max_dp_link_rate)
- link_info->rate = link->max_dp_link_rate;
-
/* Limit data lanes from LTTPR capabilities, if any */
- max_lttpr_lanes = drm_dp_lttpr_max_lane_count(panel->link->lttpr_common_caps);
if (max_lttpr_lanes && max_lttpr_lanes < link_info->num_lanes)
link_info->num_lanes = max_lttpr_lanes;
- /* Limit link rate from LTTPR capabilities, if any */
- max_lttpr_rate = drm_dp_lttpr_max_link_rate(panel->link->lttpr_common_caps);
- if (max_lttpr_rate && max_lttpr_rate < link_info->rate)
- link_info->rate = max_lttpr_rate;
-
drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor);
drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate);
+ drm_dbg_dp(panel->drm_dev, "link_rate_set=%d\n", link_info->rate_set);
+ drm_dbg_dp(panel->drm_dev, "use_rate_set=%d\n", link_info->use_rate_set);
drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes);
if (drm_dp_enhanced_frame_cap(dpcd))