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| author | Rob Clark <robin.clark@oss.qualcomm.com> | 2026-05-26 07:50:42 -0700 |
|---|---|---|
| committer | Rob Clark <robin.clark@oss.qualcomm.com> | 2026-05-29 07:07:28 -0700 |
| commit | 90f2b0461b0cf41b1553d9ec51fba0d6bb1695b2 (patch) | |
| tree | d7391e3b088fcf1a7206f1c52bf397de27af1ba1 /drivers/gpu/drm/msm/adreno/a8xx_gpu.c | |
| parent | 4250923945d05311f41411e8e9d3cffc72a9c523 (diff) | |
| download | linux-next-90f2b0461b0cf41b1553d9ec51fba0d6bb1695b2.tar.gz linux-next-90f2b0461b0cf41b1553d9ec51fba0d6bb1695b2.zip | |
drm/msm/a6xx: Add yield & flush helper
It's a common pattern, needing to insert a yield packet before flushing
the rb. And we'll need this once again for configuring perfcntr SEL
regs. So add a helper.
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Anna Maniscalco <anna.maniscalco2000@gmail.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/728208/
Message-ID: <20260526145137.160554-9-robin.clark@oss.qualcomm.com>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a8xx_gpu.c')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c index 9cf307cf9fda..f29cd6e1fde0 100644 --- a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c @@ -484,15 +484,7 @@ static int a8xx_preempt_start(struct msm_gpu *gpu) a6xx_emit_set_pseudo_reg(ring, a6xx_gpu, NULL); - /* Yield the floor on command completion */ - OUT_PKT7(ring, CP_CONTEXT_SWITCH_YIELD, 4); - OUT_RING(ring, 0x00); - OUT_RING(ring, 0x00); - OUT_RING(ring, 0x00); - /* Generate interrupt on preemption completion */ - OUT_RING(ring, 0x00); - - a6xx_flush(gpu, ring); + a6xx_flush_yield(gpu, ring); return a8xx_idle(gpu, ring) ? 0 : -EINVAL; } |