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authorChris Wilson <chris@chris-wilson.co.uk>2019-02-13 23:20:47 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2019-02-14 21:41:45 +0000
commit9a3b19a16dc28ab717cf1663d09ffee0715b735a (patch)
tree65c3e831b339c19a35ac53407c40eee6702e156f /drivers/gpu/drm/i915/intel_lrc.c
parentd31c85fc864269ab8e6fb6ed36c87f2fc33a9430 (diff)
downloadlinux-next-9a3b19a16dc28ab717cf1663d09ffee0715b735a.tar.gz
linux-next-9a3b19a16dc28ab717cf1663d09ffee0715b735a.zip
drm/i915: Only try to park engines after a failed reset
Currently we try to stop the engine by programming the ring registers to be disabled before we perform the reset. Sometimes, we see the context image also have invalid ring registers, which one presumes may be actually caused by us doing so. Lets risk not doing programming the ring to zero on the first attempt to avoid preserving that corruption into the context image, leaving the w/a in place for subsequent reset attempts. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190213232047.8486-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a62791a30c7e..34a0866959c5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1889,6 +1889,8 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine)
__tasklet_disable_sync_once(&execlists->tasklet);
GEM_BUG_ON(!reset_in_progress(execlists));
+ intel_engine_stop_cs(engine);
+
/* And flush any current direct submission. */
spin_lock_irqsave(&engine->timeline.lock, flags);
process_csb(engine); /* drain preemption events */