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authorDave Airlie <airlied@redhat.com>2026-05-06 10:54:51 +1000
committerDave Airlie <airlied@redhat.com>2026-05-06 10:55:14 +1000
commit7a777dccc2d7957f81fec38183abd15254679ac4 (patch)
treeca8e96efe3750b0a4825fc59a8c62a65ac52741c /drivers/gpu/drm/display/drm_dp_tunnel.c
parent5077f45ecdd6098996c54082c9a4539d5480f8b1 (diff)
parent025f89b01ed8d5e65d87ed54f231e10c6ac08188 (diff)
downloadlinux-next-7a777dccc2d7957f81fec38183abd15254679ac4.tar.gz
linux-next-7a777dccc2d7957f81fec38183abd15254679ac4.zip
Merge tag 'drm-intel-next-2026-05-05' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
- Enable PIPEDMC_ERROR interrupt (Dibin) - Some general display fixes and cleanups (Ville, Nemesa, Suraj, Dibin, Arun, Desnes, Juha-Pekka, Vidya, Julian) - More refactor to split display code (Jani, Ville, Luca) - Panel Replay BW optimization (Animesh) - Integrate the sharpness filter properly into the scaler (Ville) - Watermark/SAGV fixes/cleanups/etc (Ville) - Restructure DP/HDMI sink format handling (Ville) - Eliminate FB usage from low level pinning code (Ville) - Some initial prep patches for always enable AS SDP (Ankit) - Many PSR related fixes (Jouni) - Fix MST VCPI lookup and modeset-lock splat (Suraj) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/afot1cjSpeAjYzg2@intel.com
Diffstat (limited to 'drivers/gpu/drm/display/drm_dp_tunnel.c')
-rw-r--r--drivers/gpu/drm/display/drm_dp_tunnel.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/display/drm_dp_tunnel.c b/drivers/gpu/drm/display/drm_dp_tunnel.c
index bb67f1b83626..76c6bc84a806 100644
--- a/drivers/gpu/drm/display/drm_dp_tunnel.c
+++ b/drivers/gpu/drm/display/drm_dp_tunnel.c
@@ -149,6 +149,7 @@ struct drm_dp_tunnel {
bool bw_alloc_enabled:1;
bool has_io_error:1;
bool destroyed:1;
+ bool pr_optimization_support:1;
};
struct drm_dp_tunnel_group_state;
@@ -508,6 +509,8 @@ create_tunnel(struct drm_dp_tunnel_mgr *mgr,
tunnel->bw_alloc_supported = tunnel_reg_bw_alloc_supported(regs);
tunnel->bw_alloc_enabled = tunnel_reg_bw_alloc_enabled(regs);
+ tunnel->pr_optimization_support = tunnel_reg(regs, DP_TUNNELING_CAPABILITIES) &
+ DP_PANEL_REPLAY_OPTIMIZATION_SUPPORT;
if (!add_tunnel_to_group(mgr, drv_group_id, tunnel)) {
kfree(tunnel);
@@ -1036,6 +1039,20 @@ bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel *tunnel)
}
EXPORT_SYMBOL(drm_dp_tunnel_bw_alloc_is_enabled);
+/**
+ * drm_dp_tunnel_pr_optimization_supported - Query the PR BW optimization support
+ * @tunnel: Tunnel object
+ *
+ * Query if the PR BW optimization is supported for @tunnel.
+ *
+ * Returns %true if the PR BW optimiation is supported for @tunnel.
+ */
+bool drm_dp_tunnel_pr_optimization_supported(const struct drm_dp_tunnel *tunnel)
+{
+ return tunnel && tunnel->pr_optimization_support;
+}
+EXPORT_SYMBOL(drm_dp_tunnel_pr_optimization_supported);
+
static int clear_bw_req_state(struct drm_dp_aux *aux)
{
u8 bw_req_mask = DP_BW_REQUEST_SUCCEEDED | DP_BW_REQUEST_FAILED;