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authorMichael Strauss <michael.strauss@amd.com>2026-02-19 11:15:24 -0500
committerAlex Deucher <alexander.deucher@amd.com>2026-07-01 11:16:30 -0400
commitd613cf73a97c396a2a8ba2badd48cc27af38a265 (patch)
tree711109985e96ffe771ea0febba035b93161f68cc /drivers/gpu/drm/amd/display
parentadda7c46500a57b84bd9cbc9d94d8e8ab71ad724 (diff)
downloadlinux-next-d613cf73a97c396a2a8ba2badd48cc27af38a265.tar.gz
linux-next-d613cf73a97c396a2a8ba2badd48cc27af38a265.zip
drm/amd/display: Add 12bpc Color Ramp Support
[WHY] 12bpc color ramp pattern was never implemented. [HOW] Add correct DPG_RAMP_CONTROL programming to match DP color ramp spec. Reviewed-by: George Shen <george.shen@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
-rw-r--r--drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c33
1 files changed, 25 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c b/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c
index 83730bbe26a8..50b6973ef123 100644
--- a/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c
+++ b/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c
@@ -149,6 +149,9 @@ void opp2_set_disp_pattern_generator(
case TEST_PATTERN_COLOR_FORMAT_BPC_10:
dst_bpc = 10;
break;
+ case TEST_PATTERN_COLOR_FORMAT_BPC_12:
+ dst_bpc = 12;
+ break;
default:
dst_bpc = 8;
break;
@@ -192,22 +195,25 @@ void opp2_set_disp_pattern_generator(
case CONTROLLER_DP_TEST_PATTERN_COLORRAMP:
{
- mode = (bit_depth ==
- TEST_PATTERN_COLOR_FORMAT_BPC_10 ?
- TEST_PATTERN_MODE_DUALRAMP_RGB :
- TEST_PATTERN_MODE_SINGLERAMP_RGB);
-
switch (bit_depth) {
case TEST_PATTERN_COLOR_FORMAT_BPC_6:
+ mode = TEST_PATTERN_MODE_SINGLERAMP_RGB;
dst_bpc = 6;
break;
case TEST_PATTERN_COLOR_FORMAT_BPC_8:
+ mode = TEST_PATTERN_MODE_SINGLERAMP_RGB;
dst_bpc = 8;
break;
case TEST_PATTERN_COLOR_FORMAT_BPC_10:
+ mode = TEST_PATTERN_MODE_DUALRAMP_RGB;
dst_bpc = 10;
break;
+ case TEST_PATTERN_COLOR_FORMAT_BPC_12:
+ mode = TEST_PATTERN_MODE_DUALRAMP_RGB;
+ dst_bpc = 12;
+ break;
default:
+ mode = TEST_PATTERN_MODE_SINGLERAMP_RGB;
dst_bpc = 8;
break;
}
@@ -244,9 +250,20 @@ void opp2_set_disp_pattern_generator(
case TEST_PATTERN_COLOR_FORMAT_BPC_10:
{
REG_SET_3(DPG_RAMP_CONTROL, 0,
- DPG_RAMP0_OFFSET, 384 << 6,
- DPG_INC0, inc_base,
- DPG_INC1, inc_base + 2);
+ DPG_RAMP0_OFFSET, 384 << inc_base, // 384 start point
+ DPG_INC0, inc_base, // step size of 1
+ DPG_INC1, inc_base + 2); // step size of 4 (1 << 2)
+ REG_UPDATE_2(DPG_CONTROL,
+ DPG_VRES, 5,
+ DPG_HRES, 8);
+ }
+ break;
+ case TEST_PATTERN_COLOR_FORMAT_BPC_12:
+ {
+ REG_SET_3(DPG_RAMP_CONTROL, 0,
+ DPG_RAMP0_OFFSET, 1920 << inc_base, // 1920 start point
+ DPG_INC0, inc_base, // step size of 1
+ DPG_INC1, inc_base + 4); // step size of 16 (1 << 4)
REG_UPDATE_2(DPG_CONTROL,
DPG_VRES, 5,
DPG_HRES, 8);