drm/amd/display: Fold plane modifier list tests

[WHAT]
Reduce the six KUnit tests for amdgpu_dm_plane_get_plane_modifiers() to
three, keeping every family dispatch covered.

[HOW]
Merge the GFX10.1, GFX10.3 and GFX12 cases into one table-driven test
over the family and GC IP version, and merge the two RV cases into a
table over the external revision id that selects the constant-encode
modifier variants.

Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 87 insertions, 144 deletions

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c
index c2d26e0ca109..f11ae8e82adc 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c
@@ -1341,152 +1341,117 @@ static void dm_test_get_plane_modifiers_gfx9(struct kunit *test)
 }
 
 /**
- * dm_test_get_plane_modifiers_rv() - Verify RV modifier list generation.
+ * dm_test_get_plane_modifiers_gfx10_and_gfx12() - Verify newer family dispatch.
  * @test: KUnit test context.
  *
- * Verify if pre-Raven2 RV devices add RV-specific S-swizzle modifiers and
- * non-constant-encode DCC modifiers.
+ * Verify if the GFX10.1, GFX10.3 and GFX12 configurations each dispatch to
+ * their modifier builder and produce a terminated list.
  */
-static void dm_test_get_plane_modifiers_rv(struct kunit *test)
+static void dm_test_get_plane_modifiers_gfx10_and_gfx12(struct kunit *test)
 {
-	struct amdgpu_device *adev;
-	u64 *mods;
-	u64 dcc_mod;
-	u64 s_x_mod;
-	u64 s_mod;
-	int pipes = 2;
-	int pipe_xor_bits = 3;
-	int bank_xor_bits = 2;
-
-	adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
-	KUNIT_ASSERT_NOT_NULL(test, adev);
+	static const struct {
+		u32 family;
+		u32 gc_ip_version;
+		u32 num_pipes;
+		u32 num_pkrs;
+	} cases[] = {
+		{ AMDGPU_FAMILY_NV, IP_VERSION(10, 1, 0), 4, 0 },
+		{ AMDGPU_FAMILY_NV, IP_VERSION(10, 3, 0), 4, 2 },
+		{ AMDGPU_FAMILY_GC_12_0_0, 0, 0, 0 },
+	};
+	unsigned int i;
 
-	adev->family = AMDGPU_FAMILY_RV;
-	adev->asic_type = CHIP_RAVEN;
-	adev->external_rev_id = 0x80;
-	adev->gfx.config.gb_addr_config_fields.num_pipes = 4;
-	adev->gfx.config.gb_addr_config_fields.num_banks = 4;
-	adev->gfx.config.gb_addr_config_fields.num_se = 2;
-	adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 2;
+	for (i = 0; i < ARRAY_SIZE(cases); i++) {
+		struct amdgpu_device *adev;
 
-	mods = dm_test_get_primary_mods(test, adev);
-	dcc_mod = AMD_FMT_MOD |
-		  AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S_X) |
-		  AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9) |
-		  AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
-		  AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits) |
-		  AMD_FMT_MOD_SET(DCC, 1) |
-		  AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
-		  AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B) |
-		  AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 0);
-	s_x_mod = AMD_FMT_MOD |
-		  AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S_X) |
-		  AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9) |
-		  AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
-		  AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits);
-	s_mod = AMD_FMT_MOD |
-		AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S) |
-		AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9);
+		adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
+		KUNIT_ASSERT_NOT_NULL(test, adev);
 
-	KUNIT_EXPECT_TRUE(test, dm_test_mods_contain(mods, dcc_mod));
-	KUNIT_EXPECT_TRUE(test, dm_test_mods_contain(mods, dcc_mod |
-							     AMD_FMT_MOD_SET(DCC_RETILE, 1) |
-							     AMD_FMT_MOD_SET(RB, 2) |
-							     AMD_FMT_MOD_SET(PIPE, pipes)));
-	KUNIT_EXPECT_TRUE(test, dm_test_mods_contain(mods, s_x_mod));
-	KUNIT_EXPECT_TRUE(test, dm_test_mods_contain(mods, s_mod));
+		adev->family = cases[i].family;
+		adev->ip_versions[GC_HWIP][0] = cases[i].gc_ip_version;
+		adev->gfx.config.gb_addr_config_fields.num_pipes = cases[i].num_pipes;
+		adev->gfx.config.gb_addr_config_fields.num_pkrs = cases[i].num_pkrs;
 
-	kfree(mods);
+		dm_test_expect_mods_terminated(test, adev);
+	}
 }
 
 /**
- * dm_test_get_plane_modifiers_rv_constant_encode() - Verify Raven2+ modifiers.
+ * dm_test_get_plane_modifiers_rv() - Verify RV modifier list generation.
  * @test: KUnit test context.
  *
- * Verify if Raven2 and later RV devices add the constant-encode modifier
- * variants.
+ * Verify if RV devices add the RV-specific S-swizzle modifiers, and if the
+ * constant-encode DCC variants only appear from Raven2 onwards.
  */
-static void dm_test_get_plane_modifiers_rv_constant_encode(struct kunit *test)
+static void dm_test_get_plane_modifiers_rv(struct kunit *test)
 {
-	struct amdgpu_device *adev;
-	u64 *mods;
-	u64 dcc_mod;
+	static const struct {
+		const char *name;
+		u32 external_rev_id;
+		u32 constant_encode;
+	} cases[] = {
+		{ "raven", 0x80, 0 },
+		{ "raven2", 0x81, 1 },
+	};
 	int pipes = 2;
 	int pipe_xor_bits = 3;
 	int bank_xor_bits = 2;
+	u64 s_x_mod;
+	u64 s_mod;
+	unsigned int i;
 
-	adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
-	KUNIT_ASSERT_NOT_NULL(test, adev);
-
-	adev->family = AMDGPU_FAMILY_RV;
-	adev->asic_type = CHIP_RAVEN;
-	adev->external_rev_id = 0x81;
-	adev->gfx.config.gb_addr_config_fields.num_pipes = 4;
-	adev->gfx.config.gb_addr_config_fields.num_banks = 4;
-	adev->gfx.config.gb_addr_config_fields.num_se = 2;
-	adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 2;
-
-	mods = dm_test_get_primary_mods(test, adev);
-	dcc_mod = AMD_FMT_MOD |
+	s_x_mod = AMD_FMT_MOD |
 		  AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S_X) |
 		  AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9) |
 		  AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
-		  AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits) |
-		  AMD_FMT_MOD_SET(DCC, 1) |
-		  AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
-		  AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B) |
-		  AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1);
-
-	KUNIT_EXPECT_TRUE(test, dm_test_mods_contain(mods, dcc_mod));
-	KUNIT_EXPECT_TRUE(test, dm_test_mods_contain(mods, dcc_mod |
-							     AMD_FMT_MOD_SET(DCC_RETILE, 1) |
-							     AMD_FMT_MOD_SET(RB, 2) |
-							     AMD_FMT_MOD_SET(PIPE, pipes)));
-
-	kfree(mods);
-}
-
-/**
- * dm_test_get_plane_modifiers_gfx10_1() - Verify GFX10.1 modifier list generation.
- * @test: KUnit test context.
- *
- * Verify if a pre-10.3 NV family device dispatches to the GFX10.1 modifier
- * builder and produces a terminated list.
- */
-static void dm_test_get_plane_modifiers_gfx10_1(struct kunit *test)
-{
-	struct amdgpu_device *adev;
-
-	adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
-	KUNIT_ASSERT_NOT_NULL(test, adev);
-
-	adev->family = AMDGPU_FAMILY_NV;
-	adev->gfx.config.gb_addr_config_fields.num_pipes = 4;
-	adev->ip_versions[GC_HWIP][0] = IP_VERSION(10, 1, 0);
-
-	dm_test_expect_mods_terminated(test, adev);
-}
-
-/**
- * dm_test_get_plane_modifiers_gfx10_3() - Verify GFX10.3 modifier list generation.
- * @test: KUnit test context.
- *
- * Verify if a 10.3+ NV family device dispatches to the GFX10.3 modifier
- * builder and produces a terminated list.
- */
-static void dm_test_get_plane_modifiers_gfx10_3(struct kunit *test)
-{
-	struct amdgpu_device *adev;
+		  AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits);
+	s_mod = AMD_FMT_MOD |
+		AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S) |
+		AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9);
 
-	adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
-	KUNIT_ASSERT_NOT_NULL(test, adev);
+	for (i = 0; i < ARRAY_SIZE(cases); i++) {
+		struct amdgpu_device *adev;
+		u64 *mods;
+		u64 dcc_mod;
+		u64 retile_mod;
 
-	adev->family = AMDGPU_FAMILY_NV;
-	adev->gfx.config.gb_addr_config_fields.num_pipes = 4;
-	adev->gfx.config.gb_addr_config_fields.num_pkrs = 2;
-	adev->ip_versions[GC_HWIP][0] = IP_VERSION(10, 3, 0);
+		adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
+		KUNIT_ASSERT_NOT_NULL(test, adev);
 
-	dm_test_expect_mods_terminated(test, adev);
+		adev->family = AMDGPU_FAMILY_RV;
+		adev->asic_type = CHIP_RAVEN;
+		adev->external_rev_id = cases[i].external_rev_id;
+		adev->gfx.config.gb_addr_config_fields.num_pipes = 4;
+		adev->gfx.config.gb_addr_config_fields.num_banks = 4;
+		adev->gfx.config.gb_addr_config_fields.num_se = 2;
+		adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 2;
+
+		mods = dm_test_get_primary_mods(test, adev);
+		dcc_mod = AMD_FMT_MOD |
+			  AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S_X) |
+			  AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9) |
+			  AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
+			  AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits) |
+			  AMD_FMT_MOD_SET(DCC, 1) |
+			  AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
+			  AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B) |
+			  AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, cases[i].constant_encode);
+		retile_mod = dcc_mod |
+			     AMD_FMT_MOD_SET(DCC_RETILE, 1) |
+			     AMD_FMT_MOD_SET(RB, 2) |
+			     AMD_FMT_MOD_SET(PIPE, pipes);
+
+		KUNIT_EXPECT_TRUE_MSG(test, dm_test_mods_contain(mods, dcc_mod),
+				      "%s", cases[i].name);
+		KUNIT_EXPECT_TRUE_MSG(test, dm_test_mods_contain(mods, retile_mod),
+				      "%s", cases[i].name);
+		KUNIT_EXPECT_TRUE_MSG(test, dm_test_mods_contain(mods, s_x_mod),
+				      "%s", cases[i].name);
+		KUNIT_EXPECT_TRUE_MSG(test, dm_test_mods_contain(mods, s_mod),
+				      "%s", cases[i].name);
+
+		kfree(mods);
+	}
 }
 
 /**
@@ -1572,25 +1537,6 @@ static void dm_test_get_plane_modifiers_gfx11_256k_first(struct kunit *test)
 }
 
 /**
- * dm_test_get_plane_modifiers_gfx12() - Verify GFX12 modifier list generation.
- * @test: KUnit test context.
- *
- * Verify if the GFX12 family dispatches to the GFX12 modifier builder and
- * produces a terminated list.
- */
-static void dm_test_get_plane_modifiers_gfx12(struct kunit *test)
-{
-	struct amdgpu_device *adev;
-
-	adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
-	KUNIT_ASSERT_NOT_NULL(test, adev);
-
-	adev->family = AMDGPU_FAMILY_GC_12_0_0;
-
-	dm_test_expect_mods_terminated(test, adev);
-}
-
-/**
  * dm_test_fill_gfx9_plane_attributes_dcc() - Verify GFX9 DCC modifier path.
  * @test: KUnit test context.
  *
@@ -3949,12 +3895,9 @@ static struct kunit_case amdgpu_dm_plane_test_cases[] = {
 	KUNIT_CASE(dm_test_get_plane_modifiers_gfx6),
 	KUNIT_CASE(dm_test_get_plane_modifiers_gfx9),
 	KUNIT_CASE(dm_test_get_plane_modifiers_rv),
-	KUNIT_CASE(dm_test_get_plane_modifiers_rv_constant_encode),
-	KUNIT_CASE(dm_test_get_plane_modifiers_gfx10_1),
-	KUNIT_CASE(dm_test_get_plane_modifiers_gfx10_3),
+	KUNIT_CASE(dm_test_get_plane_modifiers_gfx10_and_gfx12),
 	KUNIT_CASE(dm_test_get_plane_modifiers_gfx11_64k_first),
 	KUNIT_CASE(dm_test_get_plane_modifiers_gfx11_256k_first),
-	KUNIT_CASE(dm_test_get_plane_modifiers_gfx12),
 	/* amdgpu_dm_plane_fill_dc_scaling_info() */
 	KUNIT_CASE(dm_test_fill_dc_scaling_info),
 	KUNIT_CASE(dm_test_fill_dc_scaling_info_nv12_dcn1x),