diff options
| author | Ilya Bakoulin <Ilya.Bakoulin@amd.com> | 2026-09-02 16:43:41 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-09-17 11:38:26 -0400 |
| commit | d4e5df4d7ec5cf163077f389e85d454d996c7805 (patch) | |
| tree | 180e55013989be850339165dafa7c925c7e12cd2 /drivers/gpu/drm/amd/display/dc | |
| parent | fd81d335f067cd8055710d08798c36557b5a6b91 (diff) | |
| download | linux-next-d4e5df4d7ec5cf163077f389e85d454d996c7805.tar.gz linux-next-d4e5df4d7ec5cf163077f389e85d454d996c7805.zip | |
drm/amd/display: Fix HDMI FRL audio enable
[Why/How]
The APG_CLOCK_EN bit can stay at 0 in some cases when going between
DPMS off and DPMS on.
Add APG_CLOCK_EN to audio_mute_control functions to make sure it gets
programmed.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hpo/dcn60/dcn60_hpo_frl_stream_encoder.c | 9 |
2 files changed, 14 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c index d4f66e62c729..43870d84ca2f 100644 --- a/drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c @@ -159,11 +159,16 @@ void hpo_enc42_audio_mute_control( struct hpo_frl_stream_encoder *enc, bool mute) { + struct dcn401_hpo_frl_stream_encoder *enc401 = DCN401_HPO_FRL_STRENC_FROM_HPO_FRL_STRENC(enc); ASSERT (enc->apg); - if (mute) + + if (mute) { enc->apg->funcs->disable_apg(enc->apg); - else + REG_UPDATE(HDMI_STREAM_ENC_AUDIO_CONTROL, HDMI_STREAM_ENC_APG_CLOCK_EN, 0); + } else { + REG_UPDATE(HDMI_STREAM_ENC_AUDIO_CONTROL, HDMI_STREAM_ENC_APG_CLOCK_EN, 1); enc->apg->funcs->enable_apg(enc->apg); + } } static const struct hpo_frl_stream_encoder_funcs dcn42_str_enc_funcs = { diff --git a/drivers/gpu/drm/amd/display/dc/hpo/dcn60/dcn60_hpo_frl_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/hpo/dcn60/dcn60_hpo_frl_stream_encoder.c index bded65896ef5..b5397d6760b1 100644 --- a/drivers/gpu/drm/amd/display/dc/hpo/dcn60/dcn60_hpo_frl_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/hpo/dcn60/dcn60_hpo_frl_stream_encoder.c @@ -36,11 +36,16 @@ static void hpo_enc60_audio_mute_control( struct hpo_frl_stream_encoder *enc, bool mute) { + struct dcn401_hpo_frl_stream_encoder *enc401 = DCN401_HPO_FRL_STRENC_FROM_HPO_FRL_STRENC(enc); ASSERT (enc->apg); - if (mute) + + if (mute) { enc->apg->funcs->disable_apg(enc->apg); - else + REG_UPDATE(HDMI_STREAM_ENC_AUDIO_CONTROL, HDMI_STREAM_ENC_APG_CLOCK_EN, 0); + } else { + REG_UPDATE(HDMI_STREAM_ENC_AUDIO_CONTROL, HDMI_STREAM_ENC_APG_CLOCK_EN, 1); enc->apg->funcs->enable_apg(enc->apg); + } } //Covered both, rounding up or rounding down from FRL Link Rate /18. |