drm/amd/display: Re-enable P-State message to SMU

[Description]
Re-enable P-State message to SMU now that support has been added on
SMU side

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2 files changed, 15 insertions, 24 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h
index 9b109959bd7f..234777bdd183 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h
@@ -170,7 +170,8 @@ typedef struct {
 #define DALSMC_MSG_ReturnHardMinStatus          0x19 ///< Return hard min status
 #define DALSMC_MSG_GetDispclkFreq               0x1A ///< Get display clock frequency. Return in MHZ
 #define DALSMC_MSG_GetDppclkFreq                0x1B ///< Get DPP clock frequency. Return in MHZ
-#define DALSMC_Message_Count                    0x1C ///< Total number of VBIS and DAL messages
+#define DALSMC_MSG_IndicatePstateStatus         0x1C ///< Set UCLK/FCLK related actions
+#define DALSMC_Message_Count                    0x1D ///< Total number of VBIS and DAL messages
 
 /** @}*/
 
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr_smu_msg.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr_smu_msg.c
index f56a49151c4d..5c1c95160892 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr_smu_msg.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr_smu_msg.c
@@ -398,29 +398,19 @@ void dcn60_smu_indicate_pstate_status(struct clk_mgr_internal *clk_mgr,
 		bool allow_fclk, bool allow_uclk,
 		bool wait_resp, bool drr_enable, bool alt_ch_enable)
 {
-	//TODO: Re-enable this function once PMFW has support for this message
-	// Temporary until message is implemented on PMFW side
-	(void)clk_mgr;
-	(void)allow_fclk;
-	(void)allow_uclk;
-	(void)wait_resp;
-	(void)drr_enable;
-	(void)alt_ch_enable;
-
-	//DALSMC_IndicatePstateStatus_arg_t arg = {};
-
-	//smu_print("SMU Indicate pstate status: allow_fclk=%d allow_uclk=%d wait_resp=%d drr_enable=%d alt_ch_enable=%d\n",
-	//		allow_fclk, allow_uclk, wait_resp, drr_enable, alt_ch_enable);
-
-	//arg.AllowFclk = allow_fclk ? 1 : 0;
-	//arg.AllowUclk = allow_uclk ? 1 : 0;
-	//arg.WaitResp  = wait_resp ? 1 : 0;
-	//arg.DrrEnable = drr_enable ? 1 : 0;
-	//arg.AltCh = alt_ch_enable ? 1 : 0;
-
-	// DALSMC_MSG_IndicatePstateStatus not defined in latest dalsmc.h header. Comment out for now.
-	//dcn60_smu_send_msg_with_args(clk_mgr,
-	//		DALSMC_MSG_IndicatePstateStatus, arg.Args, NULL, NULL);
+	DALSMC_IndicatePstateStatus_arg_t arg = {};
+
+	smu_print("SMU Indicate pstate status: allow_fclk=%d allow_uclk=%d wait_resp=%d drr_enable=%d alt_ch_enable=%d\n",
+			allow_fclk, allow_uclk, wait_resp, drr_enable, alt_ch_enable);
+
+	arg.AllowFclk = allow_fclk ? 1 : 0;
+	arg.AllowUclk = allow_uclk ? 1 : 0;
+	arg.WaitResp  = wait_resp ? 1 : 0;
+	arg.DrrEnable = drr_enable ? 1 : 0;
+	arg.AltCh = alt_ch_enable ? 1 : 0;
+
+	dcn60_smu_send_msg_with_args(clk_mgr,
+			DALSMC_MSG_IndicatePstateStatus, arg.Args, NULL, NULL);
 }
 
 static bool dcn60_smu_transfer_table_smu_2_dram(struct clk_mgr_internal *clk_mgr,