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| author | Harry Wentland <harry.wentland@amd.com> | 2026-04-23 17:40:22 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-06-03 13:44:59 -0400 |
| commit | 547cc004c3c180cbf9da2089ddbde5bc430663eb (patch) | |
| tree | 58e10baf467b86619ea8db460eb996a71a85a5d9 /drivers/gpu/drm/amd/display/dc/optc | |
| parent | 7e5760f084d06ca57e46e4dbf7ef08f03f857be8 (diff) | |
| download | linux-next-547cc004c3c180cbf9da2089ddbde5bc430663eb.tar.gz linux-next-547cc004c3c180cbf9da2089ddbde5bc430663eb.zip | |
drm/amd/display: add HDMI 2.1 DSC over FRL support
Add all the bits to enable DSC over FRL.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/optc')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c index d72574db1f07..90ec4cb8a9dd 100644 --- a/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c +++ b/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c @@ -189,7 +189,13 @@ void optc3_set_dsc_config(struct timing_generator *optc, struct optc *optc1 = DCN10TG_FROM_TG(optc); optc2_set_dsc_config(optc, dsc_mode, dsc_bytes_per_pixel, dsc_slice_width); - REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 0); + + if (dsc_mode != OPTC_DSC_DISABLED + && optc1->signal == SIGNAL_TYPE_HDMI_FRL) { + REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 1); + } else { + REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 0); + } } void optc3_set_odm_bypass(struct timing_generator *optc, |