diff options
| author | Gaghik Khachatrian <gaghik.khachatrian@amd.com> | 2026-03-12 15:42:01 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-03-30 14:55:17 -0400 |
| commit | 26ebcac0566b78a9e6bfb71fb6b3436e0fe251a6 (patch) | |
| tree | c81a68a5ba5a1225c4bd9bc9e625fd00bdfab785 /drivers/gpu/drm/amd/display/dc/dce | |
| parent | 8424ee7d524965c2ce245d30f7c778763e8c6f54 (diff) | |
| download | linux-next-26ebcac0566b78a9e6bfb71fb6b3436e0fe251a6.tar.gz linux-next-26ebcac0566b78a9e6bfb71fb6b3436e0fe251a6.zip | |
drm/amd/display: Fix Silence signed/unsighed mismatch warning in dc
[Why]
Implicit signed-to-unsigned conversions caused compiler
warnings in DC paths.
[How]
Added explicit (unsigned int)/(uint32_t) casts for sentinel -1
assignments and IRQ ~MASK initializers, with small cast alignment
in logging/DPCD code.
Functionality and behavior is unchanged; only type intent is explicit.
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com>
Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c index 5722be965422..0791b9144b00 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c @@ -610,7 +610,7 @@ static uint32_t dce112_get_pix_clk_dividers( || pix_clk_params->requested_pix_clk_100hz == 0) { DC_LOG_ERROR( "%s: Invalid parameters!!\n", __func__); - return -1; + return (uint32_t)-1; } memset(pll_settings, 0, sizeof(*pll_settings)); @@ -621,7 +621,7 @@ static uint32_t dce112_get_pix_clk_dividers( pll_settings->calculated_pix_clk_100hz = clk_src->ext_clk_khz * 10; pll_settings->actual_pix_clk_100hz = pix_clk_params->requested_pix_clk_100hz; - return -1; + return (uint32_t)-1; } dce112_get_pix_clk_dividers_helper(clk_src, @@ -1376,7 +1376,7 @@ static uint32_t dcn3_get_pix_clk_dividers( || pix_clk_params->requested_pix_clk_100hz == 0) { DC_LOG_ERROR( "%s: Invalid parameters!!\n", __func__); - return -1; + return UINT_MAX; } memset(pll_settings, 0, sizeof(*pll_settings)); |