diff options
| author | Xiang Liu <xiang.liu@amd.com> | 2026-08-04 22:50:18 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-08-06 12:45:50 -0400 |
| commit | 08bb824ae3fc73efd453cb303fdec5938ddc8aea (patch) | |
| tree | 49a376ce62916677f1abd478b1b96459da1c3cc4 /drivers/gpu/drm/amd/amdgpu | |
| parent | 7195f75e80759d4bb7a59bd79b7ff9153e63e498 (diff) | |
| download | linux-next-08bb824ae3fc73efd453cb303fdec5938ddc8aea.tar.gz linux-next-08bb824ae3fc73efd453cb303fdec5938ddc8aea.zip | |
drm/amd/ras: track debug mode for query mode
The RAS manager uses the rascore debug mode setting to control whether
MCA data is read directly or collected through PMFW MCA polling and
ClearMcaOnRead. Track that debug mode state in ras_mgr so
amdgpu_ras_get_error_query_mode() can classify queries as direct or
firmware-backed.
Limit the PMFW polling wait in recovery to firmware-backed MODE1 fatal
recovery so other reset paths, such as MODE2, do not pay the delay
unnecessarily.
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 297f8b04c4eb..35eb87591740 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -2751,7 +2751,8 @@ static void amdgpu_ras_do_recovery(struct work_struct *work) } if (amdgpu_ras_get_error_query_mode(adev, &error_query_mode)) { - if (error_query_mode == AMDGPU_RAS_FIRMWARE_ERROR_QUERY) { + if (error_query_mode == AMDGPU_RAS_FIRMWARE_ERROR_QUERY && + (ras->gpu_reset_flags & AMDGPU_RAS_GPU_RESET_MODE1_RESET)) { /* wait 500ms to ensure pmfw polling mca bank info done */ msleep(500); } @@ -4422,6 +4423,10 @@ bool amdgpu_ras_get_error_query_mode(struct amdgpu_device *adev, if (amdgpu_sriov_vf(adev)) { *error_query_mode = AMDGPU_RAS_VIRT_ERROR_COUNT_QUERY; + } else if (amdgpu_uniras_enabled(adev)) { + *error_query_mode = amdgpu_ras_mgr_get_debug_mode(adev) ? + AMDGPU_RAS_DIRECT_ERROR_QUERY : + AMDGPU_RAS_FIRMWARE_ERROR_QUERY; } else { *error_query_mode = AMDGPU_RAS_DIRECT_ERROR_QUERY; } |