summaryrefslogtreecommitdiff
path: root/drivers/cpufreq/amd-pstate.c
diff options
context:
space:
mode:
authorHans Zhang <18255117159@163.com>2026-05-01 00:32:12 +0800
committerViresh Kumar <viresh.kumar@linaro.org>2026-05-05 09:29:21 +0530
commit08a64b9bfc1c099ede2c881adfd7a49fd285e79f (patch)
tree0f3ced6352c21501d5586171703171df5f7e558a /drivers/cpufreq/amd-pstate.c
parent58d0379d29db10cf382d0b368c8da183f43e612b (diff)
downloadlinux-next-08a64b9bfc1c099ede2c881adfd7a49fd285e79f.tar.gz
linux-next-08a64b9bfc1c099ede2c881adfd7a49fd285e79f.zip
cpufreq/amd-pstate: Use FIELD_MODIFY()
Use FIELD_MODIFY() to remove open-coded bit manipulation. No functional change intended. Signed-off-by: Hans Zhang <18255117159@163.com> Reviewed-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'drivers/cpufreq/amd-pstate.c')
-rw-r--r--drivers/cpufreq/amd-pstate.c26
1 files changed, 10 insertions, 16 deletions
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 453084c67327..1037d1722263 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -246,12 +246,10 @@ static int msr_update_perf(struct cpufreq_policy *policy, u8 min_perf,
value = prev = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~(AMD_CPPC_MAX_PERF_MASK | AMD_CPPC_MIN_PERF_MASK |
- AMD_CPPC_DES_PERF_MASK | AMD_CPPC_EPP_PERF_MASK);
- value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf);
- value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, des_perf);
- value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf);
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_MAX_PERF_MASK, &value, max_perf);
+ FIELD_MODIFY(AMD_CPPC_DES_PERF_MASK, &value, des_perf);
+ FIELD_MODIFY(AMD_CPPC_MIN_PERF_MASK, &value, min_perf);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
if (trace_amd_pstate_epp_perf_enabled()) {
union perf_cached perf = READ_ONCE(cpudata->perf);
@@ -300,8 +298,7 @@ static int msr_set_epp(struct cpufreq_policy *policy, u8 epp)
int ret;
value = prev = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~AMD_CPPC_EPP_PERF_MASK;
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
if (trace_amd_pstate_epp_perf_enabled()) {
union perf_cached perf = cpudata->perf;
@@ -441,8 +438,7 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)
}
value = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~AMD_CPPC_EPP_PERF_MASK;
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
WRITE_ONCE(cpudata->cppc_req_cached, value);
return ret;
@@ -575,12 +571,10 @@ static int shmem_update_perf(struct cpufreq_policy *policy, u8 min_perf,
value = prev = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~(AMD_CPPC_MAX_PERF_MASK | AMD_CPPC_MIN_PERF_MASK |
- AMD_CPPC_DES_PERF_MASK | AMD_CPPC_EPP_PERF_MASK);
- value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf);
- value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, des_perf);
- value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf);
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_MAX_PERF_MASK, &value, max_perf);
+ FIELD_MODIFY(AMD_CPPC_DES_PERF_MASK, &value, des_perf);
+ FIELD_MODIFY(AMD_CPPC_MIN_PERF_MASK, &value, min_perf);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
if (trace_amd_pstate_epp_perf_enabled()) {
union perf_cached perf = READ_ONCE(cpudata->perf);