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authorDominique Belhachemi <domibel@debian.org>2026-04-30 03:52:59 +0000
committerConor Dooley <conor.dooley@microchip.com>2026-05-21 11:12:00 +0100
commit8e2501e1494c8d27f62eb8d36bba5af465f48962 (patch)
tree1703cc2fb42cf79603b38df0895b32db8a953e26 /drivers/cache
parent254f49634ee16a731174d2ae34bc50bd5f45e731 (diff)
downloadlinux-next-8e2501e1494c8d27f62eb8d36bba5af465f48962.tar.gz
linux-next-8e2501e1494c8d27f62eb8d36bba5af465f48962.zip
cache: sifive_ccache: Add StarFive JH7110 SoC support
This cache controller is also used on the StarFive JH7110 SoC. It does not have the data-uncorrectable ECC quirk that JH7100 has, so only QUIRK_NONSTANDARD_CACHE_OPS is set. Signed-off-by: Dominique Belhachemi <domibel@debian.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/cache')
-rw-r--r--drivers/cache/sifive_ccache.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/cache/sifive_ccache.c b/drivers/cache/sifive_ccache.c
index a86800b123b9..2acb8bdf06d5 100644
--- a/drivers/cache/sifive_ccache.c
+++ b/drivers/cache/sifive_ccache.c
@@ -124,6 +124,8 @@ static const struct of_device_id sifive_ccache_ids[] = {
{ .compatible = "sifive,fu740-c000-ccache" },
{ .compatible = "starfive,jh7100-ccache",
.data = (void *)(QUIRK_NONSTANDARD_CACHE_OPS | QUIRK_BROKEN_DATA_UNCORR) },
+ { .compatible = "starfive,jh7110-ccache",
+ .data = (void *)(QUIRK_NONSTANDARD_CACHE_OPS) },
{ .compatible = "sifive,ccache0" },
{ /* end of table */ }
};