Merge branch 'master' of https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git

3 files changed, 2 insertions, 282 deletions

diff --git a/arch/arm/crypto/aes-neonbs-glue.c b/arch/arm/crypto/aes-neonbs-glue.c
index c49ddafc54f3..f0c8bfd2ac8f 100644
--- a/arch/arm/crypto/aes-neonbs-glue.c
+++ b/arch/arm/crypto/aes-neonbs-glue.c
@@ -60,7 +60,7 @@ static int aesbs_setkey(struct crypto_skcipher *tfm, const u8 *in_key,
 			unsigned int key_len)
 {
 	struct aesbs_ctx *ctx = crypto_skcipher_ctx(tfm);
-	struct crypto_aes_ctx rk;
+	struct crypto_aes_ctx rk __cleanup(aes_zeroize_ctx);
 	int err;
 
 	err = aes_expandkey(&rk, in_key, key_len);
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 00a6bfa7478c..d175e242ee96 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1113,74 +1113,6 @@
 			num-pins = <2>;
 		};
 	};
-	p0_mbigen_alg_a:interrupt-controller@d0080000 {
-		compatible = "hisilicon,mbigen-v2";
-		reg = <0x0 0xd0080000 0x0 0x10000>;
-
-		p0_mbigen_sec_a: intc_sec {
-			msi-parent = <&p0_its_dsa_a 0x40400>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <33>;
-		};
-		p0_mbigen_smmu_alg_a: intc_smmu_alg {
-			msi-parent = <&p0_its_dsa_a 0x40b1b>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <3>;
-		};
-	};
-	p0_mbigen_alg_b:interrupt-controller@8,d0080000 {
-		compatible = "hisilicon,mbigen-v2";
-		reg = <0x8 0xd0080000 0x0 0x10000>;
-
-		p0_mbigen_sec_b: intc_sec {
-			msi-parent = <&p0_its_dsa_b 0x42400>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <33>;
-		};
-		p0_mbigen_smmu_alg_b: intc_smmu_alg {
-			msi-parent = <&p0_its_dsa_b 0x42b1b>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <3>;
-		};
-	};
-	p1_mbigen_alg_a:interrupt-controller@400,d0080000 {
-		compatible = "hisilicon,mbigen-v2";
-		reg = <0x400 0xd0080000 0x0 0x10000>;
-
-		p1_mbigen_sec_a: intc_sec {
-			msi-parent = <&p1_its_dsa_a 0x44400>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <33>;
-		};
-		p1_mbigen_smmu_alg_a: intc_smmu_alg {
-			msi-parent = <&p1_its_dsa_a 0x44b1b>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <3>;
-		};
-	};
-	p1_mbigen_alg_b:interrupt-controller@408,d0080000 {
-		compatible = "hisilicon,mbigen-v2";
-		reg = <0x408 0xd0080000 0x0 0x10000>;
-
-		p1_mbigen_sec_b: intc_sec {
-			msi-parent = <&p1_its_dsa_b 0x46400>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <33>;
-		};
-		p1_mbigen_smmu_alg_b: intc_smmu_alg {
-			msi-parent = <&p1_its_dsa_b 0x46b1b>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			num-pins = <3>;
-		};
-	};
 	p0_mbigen_dsa_a: interrupt-controller@c0080000 {
 		compatible = "hisilicon,mbigen-v2";
 		reg = <0x0 0xc0080000 0x0 0x10000>;
@@ -1237,54 +1169,6 @@
 		hisilicon,broken-prefetch-cmd;
 		status = "disabled";
 	};
-	p0_smmu_alg_a: iommu@d0040000 {
-		compatible = "arm,smmu-v3";
-		reg = <0x0 0xd0040000 0x0 0x20000>;
-		interrupt-parent = <&p0_mbigen_smmu_alg_a>;
-		interrupts = <733 1>,
-		<734 1>,
-		<735 1>;
-		interrupt-names = "eventq", "gerror", "priq";
-		#iommu-cells = <1>;
-		dma-coherent;
-		hisilicon,broken-prefetch-cmd;
-	};
-	p0_smmu_alg_b: iommu@8d0040000 {
-		compatible = "arm,smmu-v3";
-		reg = <0x8 0xd0040000 0x0 0x20000>;
-		interrupt-parent = <&p0_mbigen_smmu_alg_b>;
-		interrupts = <733 1>,
-		<734 1>,
-		<735 1>;
-		interrupt-names = "eventq", "gerror", "priq";
-		#iommu-cells = <1>;
-		dma-coherent;
-		hisilicon,broken-prefetch-cmd;
-	};
-	p1_smmu_alg_a: iommu@400d0040000 {
-		compatible = "arm,smmu-v3";
-		reg = <0x400 0xd0040000 0x0 0x20000>;
-		interrupt-parent = <&p1_mbigen_smmu_alg_a>;
-		interrupts = <733 1>,
-		<734 1>,
-		<735 1>;
-		interrupt-names = "eventq", "gerror", "priq";
-		#iommu-cells = <1>;
-		dma-coherent;
-		hisilicon,broken-prefetch-cmd;
-	};
-	p1_smmu_alg_b: iommu@408d0040000 {
-		compatible = "arm,smmu-v3";
-		reg = <0x408 0xd0040000 0x0 0x20000>;
-		interrupt-parent = <&p1_mbigen_smmu_alg_b>;
-		interrupts = <733 1>,
-		<734 1>,
-		<735 1>;
-		interrupt-names = "eventq", "gerror", "priq";
-		#iommu-cells = <1>;
-		dma-coherent;
-		hisilicon,broken-prefetch-cmd;
-	};
 
 	soc {
 		compatible = "simple-bus";
@@ -1745,170 +1629,6 @@
 					 0x0 0 0 4 &mbigen_pcie2_a 671 4>;
 			status = "disabled";
 		};
-		p0_sec_a: crypto@d0000000 {
-			compatible = "hisilicon,hip07-sec";
-			reg = <0x0 0xd0000000 0x0 0x10000>,
-			      <0x0 0xd2000000 0x0 0x10000>,
-			      <0x0 0xd2010000 0x0 0x10000>,
-			      <0x0 0xd2020000 0x0 0x10000>,
-			      <0x0 0xd2030000 0x0 0x10000>,
-			      <0x0 0xd2040000 0x0 0x10000>,
-			      <0x0 0xd2050000 0x0 0x10000>,
-			      <0x0 0xd2060000 0x0 0x10000>,
-			      <0x0 0xd2070000 0x0 0x10000>,
-			      <0x0 0xd2080000 0x0 0x10000>,
-			      <0x0 0xd2090000 0x0 0x10000>,
-			      <0x0 0xd20a0000 0x0 0x10000>,
-			      <0x0 0xd20b0000 0x0 0x10000>,
-			      <0x0 0xd20c0000 0x0 0x10000>,
-			      <0x0 0xd20d0000 0x0 0x10000>,
-			      <0x0 0xd20e0000 0x0 0x10000>,
-			      <0x0 0xd20f0000 0x0 0x10000>,
-			      <0x0 0xd2100000 0x0 0x10000>;
-			interrupt-parent = <&p0_mbigen_sec_a>;
-			iommus = <&p0_smmu_alg_a 0x600>;
-			dma-coherent;
-			interrupts = <576 4>,
-				     <577 1>, <578 4>,
-				     <579 1>, <580 4>,
-				     <581 1>, <582 4>,
-				     <583 1>, <584 4>,
-				     <585 1>, <586 4>,
-				     <587 1>, <588 4>,
-				     <589 1>, <590 4>,
-				     <591 1>, <592 4>,
-				     <593 1>, <594 4>,
-				     <595 1>, <596 4>,
-				     <597 1>, <598 4>,
-				     <599 1>, <600 4>,
-				     <601 1>, <602 4>,
-				     <603 1>, <604 4>,
-				     <605 1>, <606 4>,
-				     <607 1>, <608 4>;
-		};
-		p0_sec_b: crypto@8d0000000 {
-			compatible = "hisilicon,hip07-sec";
-			reg = <0x8 0xd0000000 0x0 0x10000>,
-			      <0x8 0xd2000000 0x0 0x10000>,
-			      <0x8 0xd2010000 0x0 0x10000>,
-			      <0x8 0xd2020000 0x0 0x10000>,
-			      <0x8 0xd2030000 0x0 0x10000>,
-			      <0x8 0xd2040000 0x0 0x10000>,
-			      <0x8 0xd2050000 0x0 0x10000>,
-			      <0x8 0xd2060000 0x0 0x10000>,
-			      <0x8 0xd2070000 0x0 0x10000>,
-			      <0x8 0xd2080000 0x0 0x10000>,
-			      <0x8 0xd2090000 0x0 0x10000>,
-			      <0x8 0xd20a0000 0x0 0x10000>,
-			      <0x8 0xd20b0000 0x0 0x10000>,
-			      <0x8 0xd20c0000 0x0 0x10000>,
-			      <0x8 0xd20d0000 0x0 0x10000>,
-			      <0x8 0xd20e0000 0x0 0x10000>,
-			      <0x8 0xd20f0000 0x0 0x10000>,
-			      <0x8 0xd2100000 0x0 0x10000>;
-			interrupt-parent = <&p0_mbigen_sec_b>;
-			iommus = <&p0_smmu_alg_b 0x600>;
-			dma-coherent;
-			interrupts = <576 4>,
-				     <577 1>, <578 4>,
-				     <579 1>, <580 4>,
-				     <581 1>, <582 4>,
-				     <583 1>, <584 4>,
-				     <585 1>, <586 4>,
-				     <587 1>, <588 4>,
-				     <589 1>, <590 4>,
-				     <591 1>, <592 4>,
-				     <593 1>, <594 4>,
-				     <595 1>, <596 4>,
-				     <597 1>, <598 4>,
-				     <599 1>, <600 4>,
-				     <601 1>, <602 4>,
-				     <603 1>, <604 4>,
-				     <605 1>, <606 4>,
-				     <607 1>, <608 4>;
-		};
-		p1_sec_a: crypto@400d0000000 {
-			compatible = "hisilicon,hip07-sec";
-			reg = <0x400 0xd0000000 0x0 0x10000>,
-			      <0x400 0xd2000000 0x0 0x10000>,
-			      <0x400 0xd2010000 0x0 0x10000>,
-			      <0x400 0xd2020000 0x0 0x10000>,
-			      <0x400 0xd2030000 0x0 0x10000>,
-			      <0x400 0xd2040000 0x0 0x10000>,
-			      <0x400 0xd2050000 0x0 0x10000>,
-			      <0x400 0xd2060000 0x0 0x10000>,
-			      <0x400 0xd2070000 0x0 0x10000>,
-			      <0x400 0xd2080000 0x0 0x10000>,
-			      <0x400 0xd2090000 0x0 0x10000>,
-			      <0x400 0xd20a0000 0x0 0x10000>,
-			      <0x400 0xd20b0000 0x0 0x10000>,
-			      <0x400 0xd20c0000 0x0 0x10000>,
-			      <0x400 0xd20d0000 0x0 0x10000>,
-			      <0x400 0xd20e0000 0x0 0x10000>,
-			      <0x400 0xd20f0000 0x0 0x10000>,
-			      <0x400 0xd2100000 0x0 0x10000>;
-			interrupt-parent = <&p1_mbigen_sec_a>;
-			iommus = <&p1_smmu_alg_a 0x600>;
-			dma-coherent;
-			interrupts = <576 4>,
-				     <577 1>, <578 4>,
-				     <579 1>, <580 4>,
-				     <581 1>, <582 4>,
-				     <583 1>, <584 4>,
-				     <585 1>, <586 4>,
-				     <587 1>, <588 4>,
-				     <589 1>, <590 4>,
-				     <591 1>, <592 4>,
-				     <593 1>, <594 4>,
-				     <595 1>, <596 4>,
-				     <597 1>, <598 4>,
-				     <599 1>, <600 4>,
-				     <601 1>, <602 4>,
-				     <603 1>, <604 4>,
-				     <605 1>, <606 4>,
-				     <607 1>, <608 4>;
-		};
-		p1_sec_b: crypto@408d0000000 {
-			compatible = "hisilicon,hip07-sec";
-			reg = <0x408 0xd0000000 0x0 0x10000>,
-			      <0x408 0xd2000000 0x0 0x10000>,
-			      <0x408 0xd2010000 0x0 0x10000>,
-			      <0x408 0xd2020000 0x0 0x10000>,
-			      <0x408 0xd2030000 0x0 0x10000>,
-			      <0x408 0xd2040000 0x0 0x10000>,
-			      <0x408 0xd2050000 0x0 0x10000>,
-			      <0x408 0xd2060000 0x0 0x10000>,
-			      <0x408 0xd2070000 0x0 0x10000>,
-			      <0x408 0xd2080000 0x0 0x10000>,
-			      <0x408 0xd2090000 0x0 0x10000>,
-			      <0x408 0xd20a0000 0x0 0x10000>,
-			      <0x408 0xd20b0000 0x0 0x10000>,
-			      <0x408 0xd20c0000 0x0 0x10000>,
-			      <0x408 0xd20d0000 0x0 0x10000>,
-			      <0x408 0xd20e0000 0x0 0x10000>,
-			      <0x408 0xd20f0000 0x0 0x10000>,
-			      <0x408 0xd2100000 0x0 0x10000>;
-			interrupt-parent = <&p1_mbigen_sec_b>;
-			iommus = <&p1_smmu_alg_b 0x600>;
-			dma-coherent;
-			interrupts = <576 4>,
-				     <577 1>, <578 4>,
-				     <579 1>, <580 4>,
-				     <581 1>, <582 4>,
-				     <583 1>, <584 4>,
-				     <585 1>, <586 4>,
-				     <587 1>, <588 4>,
-				     <589 1>, <590 4>,
-				     <591 1>, <592 4>,
-				     <593 1>, <594 4>,
-				     <595 1>, <596 4>,
-				     <597 1>, <598 4>,
-				     <599 1>, <600 4>,
-				     <601 1>, <602 4>,
-				     <603 1>, <604 4>,
-				     <605 1>, <606 4>,
-				     <607 1>, <608 4>;
-		};
 
 	};
 };
diff --git a/arch/arm64/crypto/aes-neonbs-glue.c b/arch/arm64/crypto/aes-neonbs-glue.c
index 7cb1aede9a48..20b2b23ffa1f 100644
--- a/arch/arm64/crypto/aes-neonbs-glue.c
+++ b/arch/arm64/crypto/aes-neonbs-glue.c
@@ -247,7 +247,7 @@ static int aesbs_xts_setkey(struct crypto_skcipher *tfm, const u8 *in_key,
 			    unsigned int key_len)
 {
 	struct aesbs_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
-	struct crypto_aes_ctx rk;
+	struct crypto_aes_ctx rk __cleanup(aes_zeroize_ctx);
 	int err;
 
 	err = xts_verify_key(tfm, in_key, key_len);