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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2026-08-18 18:34:58 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2026-08-18 18:34:58 -0700 |
| commit | bbd0571269b5a17bb0685fc30ea0b89b950801f5 (patch) | |
| tree | 0b6c88b0e743036c83cf6caa942b43cd9fefe378 /arch/x86/kernel/cpu | |
| parent | 94845e2929701018100389b3554dc54d1eee0c70 (diff) | |
| parent | 10b45e63a5b010be59ecbd2e437744adb12f838a (diff) | |
| download | linux-next-bbd0571269b5a17bb0685fc30ea0b89b950801f5.tar.gz linux-next-bbd0571269b5a17bb0685fc30ea0b89b950801f5.zip | |
Merge tag 'x86_cleanups_for_v7.3_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cleanups from Borislav Petkov:
- The usual pile of smallish cleanups and fixlets all over the place
* tag 'x86_cleanups_for_v7.3_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/cpu: Remove unnecessary __maybe_unused annotations
x86/msr: Document the I/O-like write semantics in the msr driver
x86/apic: Ensure ICR register write value is handled as 32 bits
x86/boot/compressed/head_64.S: Clean up SEV-related comments
Documentation/arch/x86/amd-memory-encryption.rst: Fix typo
x86/platform/quark: Fix kernel-doc warnings in imr.c
x86/ras: Move contents from arch/x86/ras/Kconfig into drivers/ras/Kconfig
x86/cpu: Move intel_get_platform_id() to cpu/intel.c
x86/mm: Fix typo in comment
x86/fpu: Fix kernel-doc formatting above fpu_enable_guest_xfd_features()
x86/cfi: Use symmetric SYM_START and SYM_END in __CFI_TYPE()
x86/cfi: Add __init_or_module annotations for fineibt
Diffstat (limited to 'arch/x86/kernel/cpu')
| -rw-r--r-- | arch/x86/kernel/cpu/common.c | 2 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/intel.c | 35 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/microcode/amd.c | 3 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/microcode/intel.c | 36 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/topology_common.c | 2 |
5 files changed, 38 insertions, 40 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e5f569444d9d..053f8c035aa3 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1651,7 +1651,7 @@ static inline bool parse_set_clear_cpuid(char *arg, bool set) int taint = 0; while (arg) { - bool found __maybe_unused = false; + bool found = false; unsigned int bit; opt = strsep(&arg, ","); diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 076bdd0d3f85..4297ceb2cb24 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -199,6 +199,41 @@ void intel_unlock_cpuid_leafs(struct cpuinfo_x86 *c) c->cpuid_level = cpuid_eax(0); } +/* + * Use CPUID to generate a "vfm" value. Useful before cpuinfo_x86 + * structures are populated. + */ +static u32 intel_cpuid_vfm(void) +{ + u32 eax = cpuid_eax(1); + u32 fam = x86_family(eax); + u32 model = x86_model(eax); + + return IFM(fam, model); +} + +u32 intel_get_platform_id(void) +{ + unsigned int val[2]; + + if (x86_hypervisor_present) + return 0; + + /* + * This can be called early. Use CPUID directly instead of + * relying on cpuinfo_x86 which may not be fully initialized. + * The PII does not have MSR_IA32_PLATFORM_ID. Everything + * before _it_ has no microcode (for Linux at least). + */ + if (intel_cpuid_vfm() <= INTEL_PENTIUM_II_KLAMATH) + return 0; + + /* get processor flags from MSR 0x17 */ + native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); + + return (val[1] >> 18) & 7; +} + static void early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c index 531dfb771c8b..6cdc410e7547 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -136,8 +136,7 @@ struct cont_desc { * Microcode patch container file is prepended to the initrd in cpio * format. See Documentation/arch/x86/microcode.rst */ -static const char -ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin"; +static const char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin"; /* * This is CPUID(1).EAX on the BSP. It is used in two ways: diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index f4a444e6114d..1142183c950c 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -121,42 +121,6 @@ static inline unsigned int exttable_size(struct extended_sigtable *et) return et->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE; } - -/* - * Use CPUID to generate a "vfm" value. Useful before cpuinfo_x86 - * structures are populated. - */ -static u32 intel_cpuid_vfm(void) -{ - u32 eax = cpuid_eax(1); - u32 fam = x86_family(eax); - u32 model = x86_model(eax); - - return IFM(fam, model); -} - -u32 intel_get_platform_id(void) -{ - unsigned int val[2]; - - if (x86_hypervisor_present) - return 0; - - /* - * This can be called early. Use CPUID directly instead of - * relying on cpuinfo_x86 which may not be fully initialized. - * The PII does not have MSR_IA32_PLATFORM_ID. Everything - * before _it_ has no microcode (for Linux at least). - */ - if (intel_cpuid_vfm() <= INTEL_PENTIUM_II_KLAMATH) - return 0; - - /* get processor flags from MSR 0x17 */ - native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); - - return (val[1] >> 18) & 7; -} - void intel_collect_cpu_info(struct cpu_signature *sig) { sig->sig = cpuid_eax(1); diff --git a/arch/x86/kernel/cpu/topology_common.c b/arch/x86/kernel/cpu/topology_common.c index cf7513416b70..f0b0a91fcf0f 100644 --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -62,7 +62,7 @@ const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c) } } -static unsigned int __maybe_unused parse_num_cores_legacy(struct cpuinfo_x86 *c) +static unsigned int parse_num_cores_legacy(struct cpuinfo_x86 *c) { struct { u32 cache_type : 5, |
