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authorJuergen Gross <jgross@suse.com>2026-06-08 07:17:33 +0200
committerIngo Molnar <mingo@kernel.org>2026-06-08 10:01:49 +0200
commit40b57cfbd29ec71a7a401d1836fe5c94a6f2e230 (patch)
tree510d887a5b21e81d485166a6a788718b0dc228be /arch/x86/kernel/cpu
parenta83db17073f0ecb265f0038aa425343dd2de25ec (diff)
downloadlinux-next-40b57cfbd29ec71a7a401d1836fe5c94a6f2e230.tar.gz
linux-next-40b57cfbd29ec71a7a401d1836fe5c94a6f2e230.zip
x86/msr: Switch rdmsr_on_cpu() users to rdmsrq_on_cpu()
In order to prepare retiring rdmsr_on_cpu() switch rdmsr_on_cpu() users to rdmsrq_on_cpu(). Tested-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Daniel Lezcano <daniel.lezcano@kernel.org> Link: https://patch.msgid.link/20260608051741.3207435-4-jgross@suse.com
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r--arch/x86/kernel/cpu/mce/amd.c6
-rw-r--r--arch/x86/kernel/cpu/mce/inject.c8
2 files changed, 7 insertions, 7 deletions
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index 6605a0224659..1305d9a2ee32 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -969,13 +969,13 @@ store_threshold_limit(struct threshold_block *b, const char *buf, size_t size)
static ssize_t show_error_count(struct threshold_block *b, char *buf)
{
- u32 lo, hi;
+ struct msr val;
/* CPU might be offline by now */
- if (rdmsr_on_cpu(b->cpu, b->address, &lo, &hi))
+ if (rdmsrq_on_cpu(b->cpu, b->address, &val.q))
return -ENODEV;
- return sprintf(buf, "%u\n", ((hi & THRESHOLD_MAX) -
+ return sprintf(buf, "%u\n", ((val.h & THRESHOLD_MAX) -
(THRESHOLD_MAX - b->threshold_limit)));
}
diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c
index d02c4f556cd0..bee9c35762b8 100644
--- a/arch/x86/kernel/cpu/mce/inject.c
+++ b/arch/x86/kernel/cpu/mce/inject.c
@@ -316,18 +316,18 @@ static struct notifier_block inject_nb = {
*/
static int toggle_hw_mce_inject(unsigned int cpu, bool enable)
{
- u32 l, h;
+ struct msr val;
int err;
- err = rdmsr_on_cpu(cpu, MSR_K7_HWCR, &l, &h);
+ err = rdmsrq_on_cpu(cpu, MSR_K7_HWCR, &val.q);
if (err) {
pr_err("%s: error reading HWCR\n", __func__);
return err;
}
- enable ? (l |= BIT(18)) : (l &= ~BIT(18));
+ enable ? (val.l |= BIT(18)) : (val.l &= ~BIT(18));
- err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, l, h);
+ err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, val.l, val.h);
if (err)
pr_err("%s: error writing HWCR\n", __func__);